參數(shù)資料
型號(hào): XRT56L85
廠商: Exar Corporation
英文描述: Low Power PCM Line Interface
中文描述: 低功耗的PCM線路接口
文件頁(yè)數(shù): 4/12頁(yè)
文件大?。?/td> 304K
代理商: XRT56L85
XRT56L85
4
Rev. 2.11
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
+20V
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature
-65
°
C to 150
°
C
. . . . . . . . . . . . .
.
SYSTEM DESCRIPTION
The Receiver
The incoming bipolar PCM signal, which is attenuated
and distorted by the cable is applied to the receiver input,
consistingoftheRXDATA(+)andRXDATA(-) pins,either
through a balanced transformer, a balanced capacitively
coupled terminal or a single-ended coaxial cable (see
Figure 5
). Apeakdetectorfollowingtheinputgeneratesa
DC reference for the positive and negative threshold
comparator (to extract the positive and negative data
pulses). Information on the positive and negative data
pulses is outputed as TTL compatible signals at pins
RPOS and RNEG, respectively.
output signal present at the RPOS pin indicates that a
positive pulse was received at the RX DATA(+)/RX
DATA(-) pins, from the incoming bipolar data stream.
Likewise an output signal present at the RNEG pin
indicates that a negative pulse was received at the RX
DATA(+)/RX DATA(-) pins.
bipolar signal to TTL compatible signals allows for digital
processing of the clock and data signals by the terminal
equipment. An example of the waveforms of the TTL
compatible recovered clock and data as output by the
receiver portion of the chip is presented in
Figure 2
,
Figure 3
and
Figure 5
.
A tank circuit tuned to the
More specifically, an
This conversion from the
appropriate frequency is added externally to provide the
appropriate frequency-selective filtering of the received
clock signal.
The Transmitter
The transmitter portion of the chip receives TTL
compatible signals andtransmits a corresponding bipolar
data stream down the line (See
Figure 5
). TPOS and
TNEG are TTL compatible signals thatdictatethepolarity
ofthepulsetobegeneratedandtransmittedontheoutput
bipolar data stream. Both TPOS and TNEG inputs are
sampled by the rising edge of the transmit clock, TCLK.
The TX DATA(+) and TX DATA(-) pins form a differential
driver output, this is used to drive AMI data down the line
via a transformer. The TX DATA(+) and TX DATA(-) pins
are open-collector outputs.
When a logic “high” signal is applied to the TPOS pin, a
positive pulse (the positive portion of the bipolar data
stream) will be transmitted to the line via the TX DATA(+)
O/P and TX DATA(-) O/P pins. Likewise, when a logic
“high” signal is applied to the TNEG pin, a negative pulse
will be transmitted to the line via the TX DATA(+) and TX
DATA(-) pins.
An illustration of the key waveforms
involved in this TTL to AMI conversion process, in the
Transmitter portion of the chip is presented in
Figure 4
.
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