參數(shù)資料
型號(hào): XRD9825ACD
廠商: EXAR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: 16-Bit Linear CIS/CCD Sensor Signal Processor with Serial Control
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封裝: 0.300 INCH, SOIC-20
文件頁數(shù): 4/33頁
文件大?。?/td> 309K
代理商: XRD9825ACD
XRD9825
4
Rev. 1.00
ELECTRICAL CHARACTERISTICS
Test Conditions: AV
DD
=DV
DD
=5V, ADCCLK=12MHz, 50% Duty Cycle, T
A
=25
°
C unless otherwise specified.
Symbol
Parameter
Min.
Typ.
Max.
Unit
Conditions
Power Supplies
AV
DD
DV
DD
I
DD
IDD
PD
Analog Power Supply
Digital I/O Power Supply
Supply Current
Power Down Power Supply Current
ADC Specifications
RES
Resolution
F
s
Maximum Sampling Rate
DNL
Differential Non-Linearity
3.0
3.0
25
3.3
3.3
40
5.5
5.5
60
50
V
V
(Note 2)
DV
DD
< AV
DD
V
DD
=5V
V
DD
=5V
mA
μ
A
16
12
Bits
MSPS
LSB
-0.7, +1.5
-0.8, +2.0
AV
DD
/10
0.67AV
DD
ADCCLK = 10MHz
ADCCLK = 12MHz
V
RB
V
REF
Bottom Reference Voltage
Differential Reference Voltage
(V
RT
- V
RB
)
Ladder Resistance
V
V
0.3
R
L
300
600
780
PGA & Offset DAC Specifications
PGARES
PGAG
MIN
PGAG
MAX
PGAGD
V
BLACK
DACRES
OFF
MIN
OFF
MAX
OFF
MIN
OFF
MAX
OFF
PGA Resolution
Minimum Gain
Maximum Gain
Gain Adjustment Step Size
Black Level Input Range
Offset DAC Resolution
Minimum Offset Adjustment
Maximum Offset Adjustment
Minimum Offset Adjustment
Maximum Offset Adjustment
Offset Adjustment Step Size
6
Bits
V/V
V/V
V/V
mV
Bits
mV
mV
mV
mV
mV
0.950
9.5
1.0
10.0
0.14
1.050
10.50
-100
8
-250
+500
-450
+350
500
DC Configuration
-200
+600
-400
+400
3.125
-150
+700
-350
+450
Mode 111, D5=0 (Note 1)
Mode 111, D5=0
Mode 111, D5=1 (Note 1)
Mode 111, D5=1
Note 1:
The additional ±100 mV of adjustment with respect to the black level input range is needed to compensate
for any additional offset introduced by the XRD9825 Buffer/PGA internally.
It is not recommended to operate the part between 3.6V and 4.4V.
Note 2:
相關(guān)PDF資料
PDF描述
XRD9825ACU 16-Bit Linear CIS/CCD Sensor Signal Processor with Serial Control
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