參數(shù)資料
型號: XRD9818ACG-F
廠商: Exar Corporation
文件頁數(shù): 7/28頁
文件大小: 0K
描述: IC 16B CCD/CIS SIG PROC 28TSSOP
標準包裝: 47
位數(shù): 16
通道數(shù): 3
功率(瓦特): 325mW
電壓 - 電源,模擬: 3 V ~ 3.6 V
電壓 - 電源,數(shù)字: 3 V ~ 3.6 V
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應商設(shè)備封裝: 28-TSSOP
包裝: 管件
xr
xr
XRD9818
3-CHANNEL 16-BIT LINEAR CCD/CIS SENSOR SIGNAL PROCESSOR
REV. 1.0.1
15
3.8
Reset and ReadBack Register
This register controls the reset and readback function of the XRD9818. The part can be reset to its power-up
default state by writing to the RESET bit.
This will reset all register contents to their default state, reset the
serial port contents and counters and configure the input mux to the red input channel.
The XRD9818 will
automatically recover approximately 10ns after the RESET bit is set high. After the reset recovery the register
contents will be reset to their default conditions and the RESET bit will be set back to a low. The readback
function is controlled through this register also.
The READ bit simply enables the readback function. When
the READ bit is set high the contents of the register pointed to by the address in RB[3:0] is put out on the data
output bus.
The register contents are output to the 10 LSB’s and the 6 MSB’s are padded with zeros. The
output data format is set to either Byte or Nibble format as controlled by the B/N bit (D3) in the MODE 1
register. The register contents will continually be output to the data bus until the readback bit is set low.
* Power-on default value
Reset - Returns all internal register values back to their default settings.
Read - Readback enable.
RB[3:0] - Readback register address. Points to the internal register of interest to be read.
RESET/READBACK REGISTER
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Reset
Read
N/A
RB[3]
RB[2]
RB[1]
RB[0]
0*
→ Normal Oper-
ation
1
→ Reset Device
0*
→ Normal Oper-
ation
1
→ Readback
Enabled
Not
used
Not
used
Not
used
Not
used
Address of register to be read
0000*
→ RED Gain register
0001
→ GREEN Gain register
1111
→ RESET/RB register
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