參數(shù)資料
型號(hào)： XR88C681CP/40-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 13/101頁(yè)
文件大?。?/td> 0K
描述： IC UART CMOS DUAL 40PDIP
標(biāo)準(zhǔn)包裝： 9
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 1 字節(jié)，3 字節(jié)
電源電壓： 4.75 V ~ 5.25 V
帶并行端口： 是
帶CMOS： 是
安裝類型： 通孔
封裝/外殼： 40-DIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 40-PDIP
包裝： 管件
其它名稱： 1016-1328-5
XR88C681
19
Rev. 2.11
C. INTERRUPT CONTROL BLOCK
The Interrupt Control Block allows the user to apply the
DUART in an “Interrupt Driven” environment.
The
DUART includes an interrupt request output signal
(-INTR), which may be programmed to be asserted upon
the occurrence of any of the following events:
D
Transmit Hold Register A or B Ready
D
Receive Hold Register A or B Ready
D
Receive FIFO A or B Full
D
Start or End of Received Break in Channels A or B
D
End of Counter/Timer Count Reached
D
Change of State on input pins, IP0, IP1, IP2, IP3
The Interrupt Control Block consists of an Interrupt Status
Registers (ISR), an Interrupt Mask Registers (IMR), a
Masked Interrupt Status Registers (MISR) and an
Interrupt Vector Register (IVR).
Table 4 lists these
registers, their address location (within the DUART).
Register
Description
Address Location
(in DUART Address Space)
ISR
IMR
MISR
IVR
Interrupt Status Register
Interrupt Mask Register
Masked Interrupt Status Register
Interrupt Vector Register
0516 (Read Only)
0516 (Write Only)
0216 (Read Only)
0C16
Table 4. Listing and Brief Description of Interrupt System Registers
The role and purpose of each of these registers are
defined here.
C.1 Interrupt Status Registers (ISR)
The contents of the ISR indicates the status of all potential
interrupt conditions. If any bits within these registers are
toggled “high”, then the corresponding condition has or is
occurring. In general, the contents of the ISR will indicate
to the processor, the source or the reason for the Interrupt
Request from the DUART. Therefore, any interrupt
service routine for the DUART should begin by reading
either this register or the MISR (Masked Interrupt Status
Register). The bit-format of the ISR is presented in
Table 5:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Input Port
Change
Delta Break
B
RXRDY/
FFULLB
TXRDYB
Counter
Ready
Delta Break
A
RXRDY/
FFULLA
TXRDYA
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
0 = No
1 = Yes
Table 5. ISR Bit Format
The definition of the meaning behind each of these bits is
presented here.
ISR[7]: Input Port Change of State
If this bit is at a logic “1”, then a change of state was
detected at Input Port pins IP0 - IP3. The user would
service this interrupt by reading the IPCR (if ISR[7] = 1).
ISR[7] is cleared when the CPU has read the Input Port
Configuration Register (IPCR). By reading the IPCR, the
user will determine:
D
The individual Input Port pin that changed state
D
The final state of the monitored input ports, following
the Change of State.
For a detailed description of the IPCR, see
Section F.
Please note that in order to enable this Interrupt
Condition, the user must do two things:
1. Write the appropriate data to the lower nibble of the
Auxiliary Control Register, ACR[3:0]. In this step, the
user is specifying which Input Pins should trigger an
“Input Port Change” Interrupt request.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR88C681J 制造商:Exar Corporation 功能描述:
XR88C681J-F 功能描述:UART 接口集成電路 0.5V-2V UART temp -45 to 85C RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR88C681JTR-F 功能描述:UART 接口集成電路 Dual Channel UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR88C681MN-S0968 制造商:Exar Corporation 功能描述:
XR88C681N/40 制造商:EXAR 制造商全稱:EXAR 功能描述:CMOS DUAL CHANNEL UART (DUART)
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