參數(shù)資料
型號(hào): XR68C92
廠商: Exar Corporation
英文描述: DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
中文描述: 兩路通用異步接收器和發(fā)射
文件頁(yè)數(shù): 6/32頁(yè)
文件大?。?/td> 282K
代理商: XR68C92
XR68C92/192
6
Rev. P1.10
SYMBOL DESCRIPTION
(* 44 TQFP Package)
Symbol
Pin
40
Signal
type
Pin Description
44
44*
active low).
IP2
40
36
34
I
Multi-purpose input or Timer/Counter External clock input.
IP3
3
2
41
I
Multi-purpose input or Channel A transmit external clock
input. The transmit data is clocked on the falling edge of the
clock.
IP4
43
39
37
I
Multi-purpose input or Channel A receive external clock
input. The received data is clocked on the rising edge of the
clock.
IP5
42
38
36
I
Multi-purpose input or Channel B Transmit external clock
input. The transmit data is clocked on the falling edge of the
clock.
-IACK
41
37
35
I
Interrupt acknowledge (active low). Indicating an interrupt
acknowledge cycle. XR68C92/192 will place the interrupt
vector on the data bus and will set -DTACK low if it has a
pending interrupt.
-CS
39
35
33
I
Chip select (active low). A low at this pin enables the serial
port / CPU data transfer operation.
D0-D7
28,18
27,19
26,20
25,21
25,16
24,17
23,18
22,19
22,12
21,13
20,14
19,15
Bi-directional data bus. Eight bit, three state data bus to
transfer information to or from the CPU. D0 is the least
significant bit of the data bus and the first serial data bit to be
received or transmitted.
I/O
R/-W
9
8
3
I
Read/Write strobe. When -CS is asserted, a high level on this
pin transfers the contents of the XR68C92/192 data bus to
the CPU, and a low level on this pin will transfer the contents
of the CPU data bus to the addressed register.
VCC
44
40
38,39
Pwr
Power supply input.
N.C.
1,12
23,34
11,23
No Connection.
相關(guān)PDF資料
PDF描述
XR68C92CJ DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
XR68C92CP DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
XR68C92CV DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
XR68C92IJ DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
XR68C92IP DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER
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