REV. 1.0.0 I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS GPIO2/CD# 18 23 31 I/O General purpose I/O or UART Carrier" />
參數(shù)資料
型號: XR20M1280IL32-F
廠商: Exar Corporation
文件頁數(shù): 45/63頁
文件大?。?/td> 0K
描述: IC UART I2C/SPI 128 BYTE 32QFN
產(chǎn)品培訓(xùn)模塊: UART Product Overview
XR21V141x Full-Speed USB UART Family
標(biāo)準(zhǔn)包裝: 490
通道數(shù): 1,UART
FIFO's: 128 字節(jié)
規(guī)程: RS485
電源電壓: 1.62 V ~ 3.63 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
其它名稱: 1016-1386
XR20M1280
5
REV. 1.0.0
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
GPIO2/CD#
18
23
31
I/O
General purpose I/O or UART Carrier-Detect (active low).
GPIO3/RI#
17
22
30
I/O
General purpose I/O or UART Ring-Indicator (active low).
GPIO4
GPIO5
GPIO6
GPIO7
-
20
19
18
17
24
23
22
21
I/O
General purpose I/Os.
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
-
15
16
17
18
19
25
26
27
I/O
General purpose I/Os.
ANCILLARY SIGNALS
XTAL1
22
31
39
I
Crystal or external clock input. Note: This input is not 5V tolerant.
XTAL2
23
32
40
O
Crystal or buffered clock output.
EN485#
11
12
I
Enable Auto RS-485 Half-Duplex Mode. This pin is sampled upon
power-up. If this pin is HIGH, then the RTS# output can be used for
Auto RTS Hardware Flow Control or as a general purpose output. If
this pin is LOW, then the RTS# output is the Auto RS-485 Half-
Duplex direction control pin.
ENIR#
-
2
I
Enable IR Mode. This pin is sampled upon power-up. If this pin is
HIGH, then the TX output and RX input will behave as the UART
transmit data output and UART receive data input. If this pin is
LOW, then the TX output and RX input will behave as the infrared
encoder data output and the infrared receive data input.
SLEEP/
PWRDN#
8
10
11
I/O
Sleep / Power Down pin. This pin powers up as the SLEEP input.
The SLEEP input can force the UART to enter into the sleep mode
after the next byte transmitted or received without meeting any of
the sleep mode conditions.
This pin can also be configured as an output pin which can be used
to indicate to the CPU that the UART has entered the sleep mode.
This output can also be used to power down other devices.
VCC_CORE
21
30
38
Pwr
1.62V to 3.63V VCC for the core. This supply voltage is used for the
core logic including the crystal oscillator circuit.
VCC_BUS
10
13
14
Pwr
1.62V to 3.63V VCC for bus interface signals.
This supply voltage pin will determine the I/O levels of the CPU bus
interface signals.
VCC_UART
16
21
28
Pwr
1.62V to 3.63V VCC for the UART signals.
This supply voltage pin will determine the I/O levels of the UART I/O
signals including GPIO[3:0].
Pin Description
NAME
QFN-24
PIN#
QFN-32
PIN#
QFN-40
PIN#
TYPE
DESCRIPTION
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