REV. 1.0.4 HIGH PERFORMANCE OCTAL PCI EXPRESS UART MPIO6 F3 I/O Multi-purpose input/output 6. The function of this pin is defined th" />
參數(shù)資料
型號(hào): XR17V358IB-0A-EVB
廠商: Exar Corporation
文件頁(yè)數(shù): 66/68頁(yè)
文件大小: 0K
描述: EVAL BOARD FOR XR17V358
產(chǎn)品培訓(xùn)模塊: PCIe UARTs
UART Product Overview
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,UART
嵌入式:
已用 IC / 零件: XR17V358
已供物品:
相關(guān)產(chǎn)品: 1016-1294-ND - IC UART PCIE OCTAL 176FPBGA
其它名稱: 1016-1293
XR17V358
7
REV. 1.0.4
HIGH PERFORMANCE OCTAL PCI EXPRESS UART
MPIO6
F3
I/O
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO7
L3
I/O
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO8
M2
I/O
Multi-purpose input/output 8. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
MPIO9
N1
I/O
Multi-purpose input/output 9. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO10
P1
I/O
Multi-purpose input/output 10. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO11
M3
I/O
Multi-purpose input/output 11. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO12
N2
I/O
Multi-purpose input/output 12. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO13
P2
I/O
Multi-purpose input/output 13. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO14
M4
I/O
Multi-purpose input/output 14. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
MPIO15
N3
I/O
Multi-purpose input/output 15. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
EEPROM SIGNALS
EECK
P13
O
Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
EECS
R14
O
Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resistor for
external sensing of EEPROM during power up.
EEDI
P14
O
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
EEDO
M12
I
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
JTAG SIGNALS
TRST#
N4
I
JTAG Test Reset. This signal is active LOW.
TCK
P3
I
JTAG Test Clock
TMS
M5
I
JTAG Test Mode Select
TDI
R3
I
JTAG Data Input
TDO
P4
O
JTAG Data Output
BUCK REGULATOR SIGNALS
ENABLE
C14
I
Connect to VCC to enable buck regulator. Connect to GND to disable buck
regulator.
PIN DESCRIPTIONS
NAME
PIN #TYPE
DESCRIPTION
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參數(shù)描述
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