REV. 1.2.2 UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART 21 TIMERMSB [31:24] and TIMERLSB [23:16] TIMERMSB and TIMERLSB form a 16-bit " />
參數(shù)資料
型號(hào): XR17D158CV-0A-EVB
廠商: Exar Corporation
文件頁(yè)數(shù): 14/73頁(yè)
文件大小: 0K
描述: EVAL BOARD FOR XR17D158 144TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
xr
XR17D158
REV. 1.2.2
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
21
TIMERMSB [31:24] and TIMERLSB [23:16]
TIMERMSB and TIMERLSB form a 16-bit value. The least-significant bit of the timer is being bit [0] of the
TIMERLSB with most-significant-bit being bit [7] in TIMERMSB. Notice that these registers do not hold the
current counter value when read. Reading the TIMERCNTL register will clear its interrupt. Default value is zero
(timer disabled) upon powerup and reset.
2.2.3
8XMODE [7:0] (default 0x00)
Each bit selects 8X or 16X sampling rate for that UART channel, bit-0 is channel 0. Logic 0 (default) selects
normal 16X sampling with logic one selects 8X sampling rate. Transmit and receive data rates will double by
selecting 8X.
2.2.4
REGA [15:8] Reserved
2.2.5
RESET [23:16] (default 0x00)
The 8-bit Reset register [RESET] provides the software with the ability to reset the UART(s) when there is a
need. Each bit is self-resetting after it is written a logic 1 to perform a reset to that channel. All registers in that
channel will be reset to the default condition, see Table 20 for details. Bit-0 =1 resets UART channel 0 with bit-
7=1 resets channel 7.
TIMERMSB Register
Bit-15 Bit-14 Bit-13 Bit-12 Bit-11 Bit-10
Bit-9 Bit-8
TIMERLSB Register
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1 Bit-0
16-Bit Timer/Counter Programmable Registers
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
8XMODE Register
Individual UART Channel 8X Clock Mode Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
RESET Register
Individual UART Channel Reset Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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