REV. 1.4.3 5V PCI BUS OCTAL UART 21 MPIOINT [7:0] (default 0x00) Enable multipurpose input pin interrupt. If the MPIO pin is select" />
參數(shù)資料
型號: XR17C158CV-F
廠商: Exar Corporation
文件頁數(shù): 14/67頁
文件大小: 0K
描述: IC UART PCI BUS 5V OCTAL 144LQFP
產(chǎn)品培訓(xùn)模塊: UART Product Overview
標(biāo)準(zhǔn)包裝: 60
特點(diǎn): *
通道數(shù): 8
FIFO's: 64 字節(jié)
規(guī)程: RS485
電源電壓: 4.5 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
其它名稱: 1016-1287
xr
XR17C158
REV. 1.4.3
5V PCI BUS OCTAL UART
21
MPIOINT [7:0] (default 0x00)
Enable multipurpose input pin interrupt. If the MPIO pin is selected by MPIOSEL as an input then bit-0 enables
input pin 0 for interrupt, and bit-7 enables input pin 7. No interrupt is enable if the pin is selected to be an
output. The interrupt is edge sensing and determined by MPIOINV and MPIOLVL registers. The MPIO interrupt
clears after a read to register MPIOLVL. The combination of MPIOLVL and MPIOINV determines the interrupt
being active low or active high, it’s level trigger. Logic 0 (default) disables the pin’s interrupt and logic 1 enables
it.
FIGURE 6. MULTIPURPOSE INPUT/OUTPUT INTERNAL CIRCUIT
MPIO
Pin [7:0]
MPIOLVL [7:0]
Read Input Level
MPIOINT [7:0]
Rising Edge
Detection
INT
OR
AND
1
0
MPIOSEL [7:0]
(Select Input=1, Output=0 )
MPIO3T [7:0]
(3-state Enable =1)
MPIOLVL [7:0]
(Output Level)
MPIOINV [7:0]
(Input Inversion Enable =1)
MPIOCKT
MPIO6
MPIO7
MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
MPIOINT Register
Multipurpose Input/Output Interrupt Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
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