參數(shù)資料
型號(hào): XR16V798IQ-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 19/56頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR16V798-A 100QFP
設(shè)計(jì)資源: XR17V798/794 Eval Board Schematic
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16V798
26
HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL BAUD RATE
REV. 1.0.1
3.1.3
8XMODE [7:0] (default 0x00)
Each bit selects 8X or 16X sampling rate for that UART channel, bit-0 is channel 0. Logic 0 (default) selects
normal 16X sampling with logic one selects 8X sampling rate. Transmit and receive data rates will double by
selecting 8X.
3.1.4
REGA [7:0](default 0x00)
Reserved.
3.1.5
RESET [7:0] (default 0x00)
The 8-bit RESET register provides the software with the ability to reset the UART(s) when there is a need.
Each bit is self-resetting after it is written a logic 1 to perform a reset to that channel. All registers in that
channel will be reset to the default condition, see Table 19 for details. As an example, bit-0 =1 resets UART
channel 0 with bit-7=1 resets channel 7.
3.1.6
SLEEP [7:0] (default 0x00)
The 8-bit Sleep register enables each UART separately to enter Sleep mode. Sleep mode reduces power
consumption when the system needs to put the UART(s) to idle. The UART enters sleep mode when there is
no interrupt pending. When all 8 UARTs are put to sleep, the on-chip oscillator shuts off to further conserve
power. In this case, the octal UART is awaken by any of the UART channel on from a receive data byte or a
change on the serial port. The UART is ready after 32 crystal clocks to ensure full functionality. Also, a special
interrupt is generated with an indication of no pending interrupt. Logic 0 (default) and logic 1 disable and
enable sleep mode respectively.
3.1.7
Device Identification and Revision
There are 2 internal registers that provide device identification and revision, DVID and DREV registers. The 8-
bit content in the DVID register provides device identification. A return value of 0x48 from this register indicates
the device is a XR16V798. The DREV register returns a 8-bit value of 0x01 for revision A, 0x02 for revision B
and so on. This information is very useful to the software driver for identifying which device it is communicating
with and to keep up with revision changes.
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
8XMODE Register
Individual UART Channel 8X Clock Mode Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
RESET Register
Individual UART Channel Reset Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Ch-6
Ch-7
Ch-5 Ch-4 Ch-3 Ch-2 Ch-1 Ch-0
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
SLEEP Register
Individual UART Channel Sleep Enable
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