參數(shù)資料
型號: XR16V654IV-F
廠商: Exar Corporation
文件頁數(shù): 2/58頁
文件大?。?/td> 0K
描述: IC UART FIFO 64B QUAD 64LQFP
標準包裝: 160
特點: *
通道數(shù): 4,QUART
FIFO's: 64 字節(jié)
規(guī)程: RS232
電源電壓: 2.25 V ~ 3.6 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調制解調器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應商設備封裝: 64-LQFP(10x10)
包裝: 托盤
其它名稱: 1016-1469
XR16V654IV-F-ND
XR16V654/654D
10
2.25V TO 3.6V QUAD UART WITH 64-BYTE FIFO
REV. 1.0.1
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
RESET
(RESET#)
20
27
37
33
43
I
When 16/68# pin is HIGH for Intel bus inter-
face, this input becomes the Reset pin
(active high). In this case, a 40 ns mini-
mum HIGH pulse on this pin will reset the
internal registers and all outputs. The UART
transmitter output will be held HIGH, the
receiver input will be ignored and outputs
are reset during reset period (Table 17).
When 16/68# pin is at LOW for Motorola
bus interface, this input becomes Reset#
pin (active low). This pin functions similarly,
but instead of a HIGH pulse, a 40 ns mini-
mum LOW pulse will reset the internal reg-
isters and outputs.
Motorola bus interface is not available on
the 64 pin package.
VCC
2, 24, 37
4, 35, 52
13, 47,
64
6, 46, 66
10, 61,
86
Pwr
2.25V to 3.6V power supply. All inputs,
except XTAL1, are 5V tolerant.
GND
21, 47
14, 28,
45, 61
6, 23, 40,
57
16, 36,
56, 76
20, 46,
71, 96
Pwr
Power supply common, ground.
GND
Center
Pad
N/A
Pwr
The center pad on the backside of the QFN
package is metallic and should be con-
nected to GND on the PCB. The thermal
pad size on the PCB should be the approxi-
mate size of this center pad and should be
solder mask defined. The solder mask
opening should be at least 0.0025" inwards
from the edge of the PCB thermal pad.
N.C.
-
1, 2, 20,
21, 22,
27, 40,
41, 42,
60, 61,
62, 80
No Connection. These pins are not used in
either the Intel or Motorola bus modes.
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN#
80-LQFP
PIN #
100-QFP
PIN #
TYPE
DESCRIPTION
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