REV. 1.0.3 INTSEL 38 - 65 6 I Interrupt Select (active high, input with internal pull" />
參數(shù)資料
型號(hào)： XR16V554IVTR-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 40/43頁(yè)
文件大小： 0K
描述： IC UART FIFO 16B QUAD 64LQFP
標(biāo)準(zhǔn)包裝： 1,000
特點(diǎn)： *
通道數(shù)： 4，QUART
FIFO's： 16 字節(jié)
規(guī)程： RS232
電源電壓： 2.25 V ~ 3.6 V
帶自動(dòng)流量控制功能： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 帶卷 (TR)
XR16V554/554D
6
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO
REV. 1.0.3
INTSEL
38
-
65
6
I
Interrupt Select (active high, input with internal pull-
down).
When 16/68# pin is HIGH for Intel bus interface, this pin
can be used in conjunction with MCR bit-3 to enable or
disable the INT A-D pins or override MCR bit-3 and
enable the interrupt outputs. Interrupt outputs are
enabled continuously when this pin is HIGH. MCR bit-3
enables and disables the interrupt output pins. In this
mode, MCR bit-3 is set to a logic 1 to enable the contin-
uous output. See MCR bit-3 description for full detail.
This pin must be LOW in the Motorola bus interface
mode. For the 64 pin packages, this pin is bonded to
VCC internally in the XR16V554D so the INT outputs
operate in the continuous interrupt mode. This pin is
bonded to GND internally in the XR16V554 and there-
fore requires setting MCR bit-3 for enabling the inter-
rupt output pins.
MODEM OR SERIAL I/O INTERFACE
TXA
TXB
TXC
TXD
6
8
28
30
8
10
39
41
17
19
51
53
29
32
69
72
O
UART channels A-D Transmit Data and infrared trans-
mit data. In this mode, the TX signal will be HIGH dur-
ing reset, or idle (no data).
RXA
RXB
RXC
RXD
48
13
22
36
62
20
29
51
7
29
41
63
17
44
57
4
I
UART channel A-D Receive Data. Normal receive data
input must idle HIGH.
RTSA#
RTSB#
RTSC#
RTSD#
3
11
25
33
5
13
36
44
14
22
48
56
26
35
66
75
O
UART channels A-D Request-to-Send (active low) or
general purpose output. If these outputs are not used,
leave them unconnected.
CTSA#
CTSB#
CTSC#
CTSD#
1
12
23
35
2
16
33
47
11
25
45
59
23
38
63
78
I
UART channels A-D Clear-to-Send (active low) or gen-
eral purpose input. These inputs should be connected
to VCC when not used.
DTRA#
DTRB#
DTRC#
DTRD#
-
3
15
34
46
12
24
46
58
24
37
64
77
O
UART channels A-D Data-Terminal-Ready (active low)
or general purpose output. If these outputs are not
used, leave them unconnected.
DSRA#
DSRB#
DSRC#
DSRD#
-
1
17
32
48
10
26
44
60
22
39
62
79
I
UART channels A-D Data-Set-Ready (active low) or
general purpose input. This input should be connected
to VCC when not used. This input has no effect on the
UART.
Pin Description
NAME
48-QFN
PIN #
64-LQFP
PIN #
68-PLCC
PIN#
80-LQFP
PIN #
TYPE
DESCRIPTION
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