參數(shù)資料
型號(hào)： XR16V2752IL-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 45/51頁(yè)
文件大小： 0K
描述： IC UART FIFO 64B DUAL 32QFN
標(biāo)準(zhǔn)包裝： 490
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
規(guī)程： RS232，RS485
電源電壓： 2.25 V ~ 3.6 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-QFN 裸露焊盤（5x5）
包裝： 托盤
XR16V2752
5
REV. 1.0.2
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
RTSB#
13
23
O
UART channel B Request-to-Send (active low) or general purpose output.
This port must be asserted prior to using auto RTS flow control, see
EFR[6], MCR[1], FCTR[1:0], EMSR[5:4] and IER[6]. For auto RS485 half-
duplex direction control, see FCTR[3] and EMSR[3].
CTSB#
17
28
I
UART channel B Clear-to-Send (active low) or general purpose input. It
can be used for auto CTS flow control, see EFR[7], and IER[7]. This input
should be connected to VCC when not used.
DTRB#
-
27
O
UART channel B Data-Terminal-Ready (active low) or general purpose
output. If this pin is not used, leave it unconnected.
DSRB#
-
29
I
UART channel B Data-Set-Ready (active low) or general purpose input.
This input should be connected to VCC when not used. This input has no
effect on the UART.
CDB#
-
30
I
UART channel B Carrier-Detect (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect
on the UART.
RIB#
-
31
I
UART channel B Ring-Indicator (active low) or general purpose input. This
input should be connected to VCC when not used. This input has no effect
on the UART.
MFB#
-
19
O
Multi-Function Output Channel B. This output pin can function as the
OP2B#, BAUDOUTB#, or RXRDYB# pin. One of these output signal func-
tions can be selected by the user programmable bits 1-2 of the Alternate
Function Register (AFR). These signal functions are described as follows:
1) OP2B# - When OP2B# (active low) is selected, the MF# pin is LOW
when MCR bit-3 is set HIGH (see MCR bit-3). MCR bit-3 defaults to a logic
0 condition after a reset or power-up.
2) BAUDOUTB# - When BAUDOUTB# function is selected, the 16X Baud
rate clock output is available at this pin.
3) RXRDYB# - RXRDYB# (active low) is intended for monitoring DMA data
transfers. See
Table 2 for more details.
ANCILLARY SIGNALS
XTAL1
4
11
I
Crystal or external clock input. Caution: this input is not 5V tolerant.
XTAL2
5
13
O
Crystal or buffered clock output.
RESET
12
21
I
Reset (active high) - A longer than 40 ns HIGH pulse on this pin will reset
the internal registers and all outputs. The UART transmitter output will be
held HIGH, the receiver input will be ignored and outputs are reset during
reset period (see
VCC
26
44, 33
Pwr
2.25 to 3.6V power supply. All input pins, except XTAL1, are 5V tolerant.
GND
20
22, 12
Pwr
Power supply common, ground.
GND
Center Pad
N/A
Pwr
The center pad on the backside of the 32-QFN package is metallic and
should be connected to GND on the PCB. The thermal pad size on the
PCB should be the approximate size of this center pad and should be sol-
der mask defined. The solder mask opening should be at least 0.0025"
inwards from the edge of the PCB thermal pad.
NC
18, 19
-
No Connect.
Pin Description
NAME
32-QFN
PIN #
44-PLCC
PIN #
TYPE
DESCRIPTION
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