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參數(shù)資料
型號： XR16V2751IM-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 23/52頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR V2751 48TQFP
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16V2751
3
REV. 1.0.1
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO AND POWERSAVE FEATURE
PIN DESCRIPTIONS
Pin Description
NAME
48-TQFP
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
26
27
28
I
Address data lines [2:0]. These 3 address lines select one of the internal registers in
UART channel A/B during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
3
2
1
48
47
46
45
44
I/O
Data bus lines [7:0] (bidirectional).
IOR#
(VCC)
19
I
When 16/68# pin is HIGH, the Intel bus interface is selected and this input becomes
read strobe (active low). The falling edge instigates an internal read cycle and
retrieves the data byte from an internal register pointed by the address lines [A2:A0],
puts the data byte on the data bus to allow the host processor to read it on the rising
edge.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input is not
used and should be connected to VCC.
IOW#
(R/W#)
15
I
When 16/68# pin is HIGH, it selects Intel bus interface and this input becomes write
strobe (active low). The falling edge instigates the internal write cycle and the rising
edge transfers the data byte on the data bus to an internal register pointed by the
address lines.
When 16/68# pin is LOW, the Motorola bus interface is selected and this input
becomes read (HIGH) and write (LOW) signal.
CSA#
(CS#)
10
I
When 16/68# pin is HIGH, this input is chip select A (active low) to enable channel A
in the device.
When 16/68# pin is LOW, this input becomes the chip select (active low) for the
Motorola bus interface.
CSB#
(A3)
11
I
When 16/68# pin is HIGH, this input is chip select B (active low) to enable channel B
in the device.
When 16/68# pin is LOW, this input becomes address line A3 which is used for chan-
nel selection in the Motorola bus interface. Input logic 0 selects channel A and logic 1
selects channel B.
INTA
(IRQ#)
30
O
When 16/68# pin is HIGH for Intel bus interface, this output becomes channel A inter-
rupt output. The output state is defined by the user through the software setting of
MCR[3]. INTA is set to the active mode and OP2A# output to a logic 0 when MCR[3]
is set to a logic 1. INTA is set to the three state mode and OP2A# to a logic 1 when
MCR[3] is set to a logic 0. See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this output becomes device
interrupt output (active low, open drain). An external pull-up resistor is required for
proper operation.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16V2751IM-F 功能描述:UART 接口集成電路 W/64 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16V2752 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
XR16V2752_07 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
XR16V2752IJ 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
XR16V2752IJ-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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