REV. 1.0.3 INTB 21 29 O UART channel B Interrupt output. The output " />
參數(shù)資料
型號(hào)： XR16V2551IM-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 34/49頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR V2551 48TQFP
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16V2551
4
HIGH PERFORMANCE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE
REV. 1.0.3
INTB
21
29
O
UART channel B Interrupt output. The output state is defined by the user through
the software setting of MCR[3]. INTB is set to the active mode and OP2B# output
LOW when MCR[3] is set to a logic 1. INTB is set to the three state mode and
OP2B# output HIGH when MCR[3] is set to a logic 0 (default). See MCR[3].
TXRDYA#
-
43
O
UART channel A Transmitter Ready (active low). The output provides the TX FIFO/
THR status for transmit channel A. See
Table 3. If it is not used, leave it uncon-
nected.
RXRDYA#
-
31
O
UART channel A Receiver Ready (active low). This output provides the RX FIFO/
RHR status for receive channel A. See
Table 3. If it is not used, leave it uncon-
nected.
TXRDYB#
-
6
O
UART channel B Transmitter Ready (active low). The output provides the TX FIFO/
THR status for transmit channel B. See
Table 4. If it is not used, leave it uncon-
nected.
RXRDYB#
-
18
O
UART channel B Receiver Ready (active low). This output provides the RX FIFO/
RHR status for receive channel B. See
Table 3. If it is not used, leave it uncon-
nected.
MODEM OR SERIAL I/O INTERFACE
TXA
5
7
O
UART channel A Transmit Data or infrared encoder data. Standard transmit and
receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be
HIGH during reset or idle (no data). Infrared IrDA transmit and receive interface is
enabled when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the
Infrared encoder/decoder interface is LOW. If it is not used, leave it unconnected.
RXA
4
5
I
UART channel A Receive Data or infrared receive data. Normal receive data input
must idle HIGH. The infrared receiver pulses typically idles at LOW but can be
inverted by software control prior going into the decoder, see MCR[6]. If this pin is
not used, tie it to VCC or pull it high via a 100k ohm resistor.
RTSA#
23
33
O
UART channel A Request-to-Send (active low) or general purpose output. This out-
put must be asserted prior to using auto RTS flow control, see EFR[6], MCR[1],
and IER[6].
CTSA#
25
38
I
UART channel A Clear-to-Send (active low) or general purpose input. It can be
used for auto CTS flow control, see EFR[7], and IER[7]. This input should be con-
nected to VCC when not used.
DTRA#
-
34
O
UART channel A Data-Terminal-Ready (active low) or general purpose output. If it
is not used, leave it unconnected.
DSRA#
-
39
I
UART channel A Data-Set-Ready (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
CDA#
-
40
I
UART channel A Carrier-Detect (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
RIA#
-
41
I
UART channel A Ring-Indicator (active low) or general purpose input. This input
should be connected to VCC when not used. This input has no effect on the UART.
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION
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XR16V2551IMTR-F 制造商:Exar Corporation 功能描述:UART 2-CH 16Byte FIFO 2.5V/3.3V 48-Pin TQFP T/R 制造商:Exar Corporation 功能描述:XR16V2551IMTR-F
XR16V2552 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 16-BYTE FIFO
XR16V2552_07 制造商:EXAR 制造商全稱:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 16-BYTE FIFO
XR16V2552IJ 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
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