- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376453 > XR-T7295 (Exar Corporation) DS3/Sonet STS-1 Integrated Line Receiver PDF資料下載
參數(shù)資料
| 型號： | XR-T7295 |
| 廠商： | Exar Corporation |
| 英文描述： | DS3/Sonet STS-1 Integrated Line Receiver |
| 中文描述： | DS3/Sonet STS - 1的集成線路接收器 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 226K |
| 代理商： | XR-T7295 |
XR-T7295
12
Rev. 1.05
A high RLOL output indicates that the acquisition circuit is
working to bring the PLL into proper frequency lock.
RLOL remains high until frequency lock has occurred;
however, the minimum RLOL pulse width is 32 clock
cycles.
PHASE HITS
In response to a phase hit in the input data, the XR-T7295
returns to error free operation in less than 2ms. During
the requisition time, RLOS may temporarily be indicated.
LOSS-OF-SIGNAL DETECTION
Figure 1shows that analog and digital methods of
loss-of-signal (LOS) detection are combined to create the
RLOS alarm output. RLOS is set if either the analog or
digital detection circuitry indicates LOS has occurred.
ANALOG DETECTION
The analog LOS detector monitors the peak input signal
amplitude. RLOS makes a high-to-low transition (input
signal regained) when the input signal amplitude exceeds
the loss-of signal threshold defined in Table 7.The RLOS
low-to-high transition (input signal loss) occurs at a level
typically 1.0 dB below the high-to-low transition level. The
hysteresis prevents RLOS chattering. Once set, the
RLOS alarm remains high for at least 32 clock cycles,
allowing for system detection of a LOS condition without
the use of an external latch.
To allow for varying levels of noise and crosstalk in
different applications, three loss-of-signal threshold
settings are available using the LOSTHR pin. Setting
LOSTHR = V
DD
provides the lowest loss-of-signal
threshold; LOSTHR = V
DD
/2 (can be produced using two
50 k
10% resistors as a voltage divider between
V
DD
D and GNDD) provides an intermediate threshold;
and LOSTHR = GND provides the highest threshold. The
LOSTHR pin must be set to its desired value at power-up
and must not be changed during operation.
DIGITAL DETECTION
In addition to the signal amplitude monitoring of the
analog LOS detector, the digital LOS detector monitors
the recovered data 1s density. The RLOS alarm goes
high if 160
32 or more consecutive 0s occur in the
receive data stream. The alarm goes low when at least
ten 1s occur in a string of 32 consecutive bits. This
hysteresis prevents RLOS chattering and guarantees a
minimum RLOS pulse width of 32 clock cycles. Note,
however, that RLOS chatter can still occur. When
REQB=1, input signal levels above the analog RLOS
threshold can still be low enough to result in a high bit error
rate. The resultant data stream (containing) errors can
temporarily activate the digital LOS detector, and RLOS
chatter can occur. Therefore, RLOS should not be used
as a bit error rate monitor.
RLOS chatter can also occur when RLOL is activated
(high).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR-T7295IW | DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7296 | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IP | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IW | DS3/STS-1, E3 Integrated Line Transmitter |
| XR16C2850 | 3.3V AND 5V DUART WITH 128-BYTE FIFO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR-T7295-1EIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
| XR-T7295-1EIW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
| XRT7295A/96ES -DS3 | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295A/96ES-DS3 | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT7295A/96ES-E3 | 功能描述:外圍驅(qū)動器與原件 - PCI comeswith XRT7295A RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。