參數(shù)資料
型號: XR-T56L22AD
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: Low Power Repeater/Receiver
中文描述: DATACOM, PCM TRANSCEIVER, PDSO18
封裝: 0.300 INCH, SOIC-18
文件頁數(shù): 6/16頁
文件大?。?/td> 344K
代理商: XR-T56L22AD
XR-T56L22
6
Rev. 1.02
ELECTRICAL CHARACTERISTICS
(CONT’D)
Parameter
Pin
Min.
Typ.
Max.
Unit
Conditions
Clock Output Stage
Output Pulse Rise Time (Tr)
11
40
ns
1
Output Pulse Fall Time (Tf)
11
40
ns
Output Pulse Width (Tw)
11
224
264
ns
Shunt Regulator
Output Voltage
12
4.85
5.1
5.35
V
Pin 13, 14 floating
Voltage Regulation Over Temp.
12
-0.02
%/
°
C
%/mA
Pin 13, 14 floating
Load Regulation
12
0.027
1mA to 100mA load
Note
1
Using a 2K pull up resistor between 11 and V
CC
and 15pF capacitance to GND.
ABSOLUTE MAXIMUM RATINGS
Storage Temperature
Operating Temperature
Supply Voltage
-65
°
C to 150
°
C
-40
°
C to 85
°
C
-0.5 to 7V
. . . . . . . . . . . . . .
. . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
Supply Voltage Surge (10ms)
Data Output Voltage (pin 9, 10)
25V
12V
. . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . .
SYSTEM DESCRIPTION
With reference to the functional block diagram, the basic
operation of the XR-T56L22 may be described as follows:
The received bipolar signal, is applied to a linear amplifier
and automatic equalizer. These circuits provide the
necessary amount of gain and phase equalization to
recover the transmitted data, and band limit the signal, to
optimize repeater performance for near-end crosstalk
produced by other systems operating within the same
cable bundle.
The preamplifier output signals which are balanced and of
opposite phase, are applied to the clock extraction and
pulse regenerator circuits. Here they are rectified and
then applied to a high Q resonant circuit which extracts
the 1.544/2.048 Mbps frequency component from the
received signal. This signal is then sliced and fed to an
adjustable phase shift circuit. A second slicer is used to
control the time at which the output signals from the
preamplifier are sampled by the pulse regenerator
circuits. The phase shifted clock signal is made available
as an output from the circuit for interface applications. The
clock phase adjustment is performed with a single pin
using an external resistor. Adjustment of the position of
the clock sampling edge by the phase shift circuit allows
performance of the pulse regenerator to be optimized.
The pulse regenerator performs the sampling and data
slicing to regenerate the appropriate output pulse. These
pulses are applied to an external output transformer to
create the bipolar signal that drives the next section of
twisted pair.
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