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8
MPC860 Family Hardware Specifications
MOTOROLA
Power Dissipation
Part V Power Dissipation
Table 5-4 provides power dissipation information. The modes are 1:1, where CPU and bus
speeds are equal, and 2:1 mode, where CPU frequency is twice bus speed.
NOTE
Values in Table 5-4” represent V
and do not include I/O power dissipation over V
dissipation varies widely by application due to buffer current,
depending on external circuitry.
DDL
-based power dissipation
DDH
. I/O power
2
Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.
Per JEDEC JESD51-6 with the board horizontal.
Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is
measured on the top surface of the board near the package.
Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate
method (MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed
pad packages where the pad would be expected to be soldered, junction to case thermal resistance is a simulated
value from the junction to the exposed pad without contact resistance.
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2.
3
4
5
6
Table 5-4. Power Dissipation (P
D
)
Die Revision
Frequency (MHz)
Typical
1
1
Typical power dissipation is measured at 3.3 V.
Maximum power dissipation is measured at 3.5 V.
Maximum
2
2
Unit
A.3 and Previous
25
450
550
mW
40
700
850
mW
50
870
1050
mW
B.1 and C.1
33
375
TBD
mW
50
575
TBD
mW
66
750
TBD
mW
D.3 and D.4
(1:1 Mode)
50
656
735
mW
66
TBD
TBD
mW
D.3 and D.4
(2:1 Mode)
66
722
762
mW
80
851
909
mW