參數(shù)資料
型號: XPC855TZP66D4
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Family Hardware Specifications
中文描述: 32-BIT, 66 MHz, RISC PROCESSOR, PBGA357
封裝: PLASTIC, BGA-357
文件頁數(shù): 68/76頁
文件大?。?/td> 857K
代理商: XPC855TZP66D4
68
MPC860 Family Hardware Specifications
MOTOROLA
MII Async Inputs Signal Timing (MII_CRS, MII_COL)
Figure 13-71 shows the MII transmit signal timing diagram.
Figure 13-71. MII Transmit Signal Timing Diagram
13.3 MII Async Inputs Signal Timing (MII_CRS,
MII_COL)
Table 13-29 provides information on the MII async inputs signal timing.
Figure 13-72 shows the MII asynchronous inputs signal timing diagram.
Figure 13-72. MII Async Inputs Timing Diagram
Table 13-28. MII Transmit Signal Timing
Num
Characteristic
Min
Max
Unit
M5
MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER invalid
5
ns
M6
MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER valid
25
M7
MII_TX_CLK pulse width high
35
65%
MII_TX_CLK
period
M8
MII_TX_CLK pulse width low
35%
65%
MII_TX_CLK
period
Table 13-29. MII Async Inputs Signal Timing
Num
Characteristic
Min
Max
Unit
M9
MII_CRS, MII_COL minimum pulse width
1.5
MII_TX_CLK
period
M6
MII_TX_CLK (Input)
MII_TXD[3:0] (Outputs)
MII_TX_EN
MII_TX_ER
M5
M7
M8
MII_CRS, MII_COL
M9
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