
XM28C020
5
THE TOGGLE BIT I/O
6
Figure 4. Toggle Bit Bus Sequence
Figure 5. Toggle Bit Software Flow
The Toggle Bit can eliminate the software housekeeping
chore of saving and fetching the last address and data
written to a device in order to implement
DATA
Polling.
This can be especially helpful in an array comprised of
multiple XM28C020 memories that is frequently up-
dated. The timing diagram in Figure 4 illustrates the
sequence of events on the bus. The software flow
diagram in Figure 5 illustrates a method for testing the
Toggle Bit.
CE
OE
WE
I/O6
READY
VOH
VOL
LAST
WRITE
HIGH Z
* Beginning and ending state of I/O6 will vary.
*
*
3872 FHD F12
3872 FHD F13
LOAD ACCUM
FROM ADDR n
COMPARE
ACCUM WITH
ADDR n
READY
COMPARE
OK
NO
YES
LAST WRITE