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參數(shù)資料
| 型號： | XE3006 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | Codec |
| 英文描述： | Low-Power Audio CODEC |
| 中文描述： | 低功耗音頻CODEC |
| 文件頁數(shù)： | 14/32頁 |
| 文件大小： | 465K |
| 代理商： | XE3006 |
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Data Sheet
XE3005/XE3006
14
D0212-116
2. Programming through SPI interface after power-up
Once the device has been powered up, the configuration registers can be modified at all times (also when the
device is active) through the SPI interface.
The following section describes the SPI protocol which is required to change the control registers from their
default values.
3.3 Serial Peripheral Interface - SPI
The serial peripheral interface (SPI) allows the device to communicate synchronously with other devices such as
a microprocessor or a DSP. The CODEC interface only implements a slave controller. This section describes the
communication from master (e.g. DSP) to slave (CODEC pin MOSI) and from slave (CODEC pin MISO) to a
master (e.g. DSP).
Four lines are used to transmit data between the slave and master:
-
MOSI (Master Out, Slave In) data from master to slave, synchronous with the SPI clock (SCK).
-
MISO (Master In, Slave Out) data from slave to master, synchronous with the SPI clock (SCK).
-
SCK (Serial Clock) synchronizes the data bits of MOSI and MISO.
-
SS (Slave Select) Slave devices are selected by activating SS.
3.3.1
Protocol
During SPI communication, data is simultaneously transmitted and received.
t
recovery
0
1
15
SS
SCK
MOSI
MISO
15
0
14
14
1
t
disable
1/F
sck
…
…
…
…
Figure 15: SPI signal timing
The master puts data on the MOSI line on the falling edge of SCK; the slave reads the data on the rising edge of
SCK. The slave puts data on the MISO line on the falling edge of SCK; the master reads the data on the rising
edge of SCK. Transmission in either direction is by 2 bytes with MSB first.
The SS pin should be kept low during the whole transfer of data.
There are three timing constraints:
-
Recovery time (t
recovery
) between the falling edge of SS and the falling edge of SCK.
-
Disable time (t
disable
) between the last rising edge of SCK and the rising edge of SS.
-
SCK frequency (F
SCK
)
Delay
Min
Max
Unit
Comments
t
recover
125
-
ns
t
disable
2 x T
master
-
ns
T
master
= clock period of the master clock MCLK
F
SCK
0.5 x F
master
Hz
F
master
= frequency of the master clock MCLK
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