參數(shù)資料
型號: XCS20XL-4VQ100C
廠商: Xilinx Inc
文件頁數(shù): 9/83頁
文件大?。?/td> 0K
描述: IC FPGA 3.3V C-TEMP HP 100VQFP
產(chǎn)品變化通告: Product Discontinuation 26/Oct/2011
標(biāo)準(zhǔn)包裝: 90
系列: Spartan®-XL
LAB/CLB數(shù): 400
邏輯元件/單元數(shù): 950
RAM 位總計: 12800
輸入/輸出數(shù): 77
門數(shù): 20000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 100-TQFP
供應(yīng)商設(shè)備封裝: 100-VQFP(14x14)
Spartan and Spartan-XL FPGA Families Data Sheet
DS060 (v2.0) March 1, 2013
17
Product Specification
R
Product Obsolete/Under Obsolescence
and Spartan-XL families, speeding up arithmetic and count-
ing functions.
The carry chain in 5V Spartan devices can run either up or
down. At the top and bottom of the columns where there are
no CLBs above and below, the carry is propagated to the
right. The default is always to propagate up the column, as
shown in the figures. The carry chain in Spartan-XL devices
can only run up the column, providing even higher speed.
Figure 16, page 18 shows a Spartan/XL FPGA CLB with
dedicated fast carry logic. The carry logic shares operand
and control inputs with the function generators. The carry
outputs connect to the function generators, where they are
combined with the operands to form the sums.
Figure 17, page 19 shows the details of the Spartan/XL
FPGA carry logic. This diagram shows the contents of the
box labeled "CARRY LOGIC" in Figure 16.
The fast carry logic can be accessed by placing special
library symbols, or by using Xilinx Relationally Placed Mac-
ros (RPMs) that already include these symbols.
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XCS20XL-4VQ100C0090 制造商:Xilinx 功能描述:
XCS20XL-4VQ100C0167 制造商:Xilinx 功能描述:
XCS20XL-4VQ100I 功能描述:IC FPGA 3.3V ITEMP HP 100VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Spartan®-XL 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA(31x31) 其它名稱:122-1789
XCS20XL-4VQ144C 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
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