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參數(shù)資料
| 型號： | XCF16PF48 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 平臺Flash在系統(tǒng)可編程配置方案管理系統(tǒng) |
| 文件頁數(shù)： | 32/46頁 |
| 文件大?。?/td> | 525K |
| 代理商： | XCF16PF48 |
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Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
32
R
T
HXT
EN_EXT_SEL hold time from CF, CE, or OE/RESET when V
CCO
= 3.3V or 2.5V
EN_EXT_SEL hold time from CF, CE, or OE/RESET when V
CCO
= 1.8V
REV_SEL setup time to CF, CE, or OE/RESET when V
CCO
= 3.3V or 2.5V
REV_SEL setup time to CF, CE, or OE/RESET when V
CCO
= 1.8V
REV_SEL hold time from CF, CE, or OE/RESET when V
CCO
= 3.3V or 2.5V
REV_SEL hold time from CF, CE, or OE/RESET when V
CCO
= 1.8V
300
–
ns
300
–
ns
T
SRV
300
–
ns
300
–
ns
T
HRV
300
–
ns
300
–
ns
Notes:
1.
2.
3.
4.
5.
6.
7.
AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
Float delays are measured with 5 pF AC loads.Transition is measured at ±200 mV from steady-state active levels.
Guaranteed by design, not tested.
All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
If T
HCE
High < 2
μ
s, T
CE
= 2
μ
s.
If T
HOE
Low < 2
μ
s, T
OE
= 2
μ
s.
This is the minimum possible T
CYCO
. Actual T
CYCO
= T
CCDD
+ FPGA Data setup time.
Example:
With the XCF32P in serial mode with V
CCO
at 3.3V, if FPGA Data setup time = 15 ns, then the actual T
CYCO
= 25 ns +15 ns = 40 ns.
The delay before the enabled CLKOUT signal begins clocking data out of the device is dependent on the clocking configuration. The delay
before CLKOUT is enabled will increase if decompression is enabled.
Slower CLK frequency option may be required to meet the FPGA data sheet setup time.
10. When decompression is enabled, the CLKOUT signal becomes a controlled clock output. When decompressed data is available, CLKOUT
will toggle at the source clock frequency (either the selected internal clock frequency or the external CLK input frequency). When
decompressed data is not available, the CLKOUT pin is parked High. If CLKOUT is used, then it must be pulled High externally using a 4.7k
Ω
pull-up to V
CCO
.
11. When JTAG CONFIG command is issued, PROM will drive CF Low for at least the T
HCF
minimum.
8.
9.
Symbol
Description
XCF08P, XCF16P,
XCF32P
Units
Min
Max
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| XCF16PFG48 | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PFS48C | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PFSG48C | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PV | Platform Flash In-System Programmable Configuration PROMS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCF16PFG48 | 制造商:XILINX 制造商全稱:XILINX 功能描述:Platform Flash In-System Programmable Configuration PROMS |
| XCF16PFS48C | 制造商:Xilinx 功能描述:CONFIGURATION PROM 48-PIN TFBGA - Trays 制造商:Xilinx 功能描述:IC SYSTEM GATE 制造商:Xilinx 功能描述:IC PROM SRL 1.8V 16M 48CSBGA |
| XCF16PFS48C0936 | 制造商:Xilinx 功能描述:IC SYSTEM GATE |
| XCF16PFS48CES | 制造商:Xilinx 功能描述: |
| XCF16PFS48CESB | 制造商:Xilinx 功能描述: |
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