參數(shù)資料
型號: XC888CLM
廠商: INFINEON TECHNOLOGIES AG
元件分類: 8位微控制器
英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁數(shù): 79/119頁
文件大?。?/td> 895K
代理商: XC888CLM
XC886/888CLM
Functional Description
Data Sheet
Prelimary
75
V0.1, 2006-02
3.11.1
Both UART modules have their own dedicated baud-rate generator, which is based on
a programmable 8-bit reload value, and includes divider stages (i.e., prescaler and
fractional divider) for generating a wide range of baud rates based on its input clock
f
PCLK
, see
Figure 31
.
Baud-Rate Generator
Figure 31
Baud-rate Generator Circuitry
The baud rate timer is a count-down timer and is clocked by either the output of the
fractional divider (f
MOD
) if the fractional divider is enabled (FDCON.FDEN = 1), or the
output of the prescaler (f
DIV
) if the fractional divider is disabled (FDEN = 0). For baud rate
generation, the fractional divider must be configured to fractional divider mode
(FDCON.FDM = 0). This allows the baud rate control run bit BCON.R to be used to start
or stop the baud rate timer. At each timer underflow, the timer is reloaded with the 8-bit
reload value in register BG and one clock pulse is generated for the serial channel.
Enabling the fractional divider in normal divider mode (FDEN = 1 and FDM = 1) stops the
baud rate timer and nullifies the effect of bit BCON.R. See
Section 3.12
.
The baud rate (f
BR
) value is dependent on the following parameters:
Input clock f
PCLK
Prescaling factor (2
BRPRE
) defined by bit field BRPRE in register BCON
FDSTEP
1
FDM
Adder
FDRES
FDEN&FDM
clk
Fractional Divider
Prescaler
NDOV
‘0’
FDEN
00
01
10
11
11
10
01
00
0
1
(overflow)
0
f
BR
8-Bit Baud Rate Timer
8-Bit Reload Value
R
0
1
f
DIV
f
DIV
f
PCLK
f
MOD
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