參數(shù)資料
型號(hào)： XC6VCX130T-1FFG784I
廠商： Xilinx Inc
文件頁數(shù)： 13/52頁
文件大小： 0K
描述： IC FPGA VIRTEX 6 128K 784FFGBGA
產(chǎn)品培訓(xùn)模塊： Virtex-6 FPGA Overview
產(chǎn)品變化通告： Virtex-6 FIFO Input Logic Reset 18/Apr/2011
標(biāo)準(zhǔn)包裝： 1
系列： Virtex® 6 CXT
LAB/CLB數(shù)： 10000
邏輯元件/單元數(shù)： 128000
RAM 位總計(jì)： 9732096
輸入/輸出數(shù)： 400
電源電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 784-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 784-FCBGA
Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
20
Table 26 summarizes the DC specifications of the clock input of the GTX transceiver. Consult theVirtex-6 FPGA GTX
Transceivers User Guide for further details.
GTX Transceiver Switching Characteristics
Consult Virtex-6 FPGA GTX Transceivers User Guide for further information.
Table 26: GTX Transceiver Clock DC Input Level Specification
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
VIDIFF
Differential peak-to-peak input voltage
210
800
2000
mV
RIN
Differential input resistance
90
100
130
CEXT
Required external AC coupling capacitor
–
100
–
nF
Table 27: GTX Transceiver Performance
Symbol
Description
Speed Grade
Units
-2
-1
FGTXMAX
Maximum GTX transceiver data rate
3.75
Gb/s
FGPLLMAX
Maximum PLL frequency
2.5
GHz
FGPLLMIN
Minimum PLL frequency
1.2
GHz
Table 28: GTX Transceiver Dynamic Reconfiguration Port (DRP) Switching Characteristics
Symbol
Description
Speed Grade
Units
-2
-1
FGTXDRPCLK
GTXDRPCLK maximum frequency
100
MHz
Table 29: GTX Transceiver Reference Clock Switching Characteristics
Symbol
Description
Conditions
All Speed Grades
Units
Min
Typ
Max
FGCLK
Reference clock frequency range
67.5
–
375
MHz
TRCLK
Reference clock rise time
20% – 80%
–
200
–
ps
TFCLK
Reference clock fall time
80% – 20%
–
200
–
ps
TDCREF
Reference clock duty cycle
Transceiver PLL only
45
50
55
%
TLOCK
Clock recovery frequency acquisition
time
Initial PLL lock
–
1
ms
TPHASE
Clock recovery phase acquisition time
Lock to data after PLL has locked to
the reference clock
–
200
s
X-Ref Target - Figure 13
Figure 13: Reference Clock Timing Parameters
ds153_13_041410
80%
20%
TFCLK
TRCLK
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XC6VCX130T-2FF1156C 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 CXT FAMILY 128000 CELLS 40NM (CMOS) TECHNOLOG - Trays 制造商:Xilinx 功能描述:IC FPGA 600 I/O 1156FCBGA 制造商:Xilinx 功能描述:IC FPGA VIRTEX 6 128K 1156BGA
XC6VCX130T-2FF1156I 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 CXT FAMILY 128000 CELLS 40NM (CMOS) TECHNOLOG - Trays 制造商:Xilinx 功能描述:IC FPGA 600 I/O 1156FCBGA
XC6VCX130T-2FF484C 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 CXT FAMILY 128000 CELLS 40NM (CMOS) TECHNOLOG - Trays 制造商:Xilinx 功能描述:IC FPGA 240 I/O 484FCBGA
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XC6VCX130T-2FF784C 制造商:Xilinx 功能描述:FPGA VIRTEX?-6 CXT FAMILY 128000 CELLS 40NM (CMOS) TECHNOLOG - Trays 制造商:Xilinx 功能描述:IC FPGA VIRTEX 6 128K 784BGA
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