Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
DS162 (v3.0) October 17, 2011
Product Specification
8
SelectIO Interface DC Input and Output Levels
Table 7: Recommended Operating Conditions for User I/Os Using Single-Ended Standards
I/O Standard
VREF for Inputs
V, Min
V, Nom
V, Max
V, Min
V, Nom
V, Max
LVTTL
3.0
3.3
3.45
VREF is not used for these I/O standards
LVCMOS33
3.0
3.3
3.45
LVCMOS25
2.3
2.5
2.7
LVCMOS18
1.65
1.8
1.95
LVCMOS18_JEDEC
1.65
1.8
1.95
LVCMOS15
1.4
1.5
1.6
LVCMOS15_JEDEC
1.4
1.5
1.6
LVCMOS12
1.1
1.2
1.3
LVCMOS12_JEDEC
1.1
1.2
1.3
3.0
3.3
3.45
3.0
3.3
3.45
I2C
2.7
3.0
3.45
SMBUS
2.7
3.0
3.45
SDIO
3.0
3.3
3.45
MOBILE_DDR
1.7
1.8
1.9
HSTL_I
1.4
1.5
1.6
0.68
0.75
0.9
HSTL_II
1.4
1.5
1.6
0.68
0.75
0.9
HSTL_III
1.4
1.5
1.6
–
0.9
–
HSTL_I_18
1.7
1.8
1.9
0.8
0.9
1.1
HSTL_II_18
1.7
1.8
1.9
–
0.9
–
HSTL_III_18
1.7
1.8
1.9
–
1.1
–
SSTL3_I
3.0
3.3
3.45
1.3
1.5
1.7
SSTL3_II
3.0
3.3
3.45
1.3
1.5
1.7
SSTL2_I
2.3
2.5
2.7
1.13
1.25
1.38
SSTL2_II
2.3
2.5
2.7
1.13
1.25
1.38
SSTL18_I
1.7
1.8
1.9
0.833
0.9
0.969
SSTL18_II
1.7
1.8
1.9
0.833
0.9
0.969
SSTL15_II
1.425
1.5
1.575
0.69
0.75
0.81
Notes:
1.
VCCO range required when using I/O standard for an output. Also required for MOBILE_DDR, PCI33_3, LVCMOS18_JEDEC,
LVCMOS15_JEDEC, and LVCMOS12_JEDEC inputs, and for LVCMOS25 inputs when VCCAUX =3.3V.
2.
For PCI systems, the transmitter and receiver should have common supplies for VCCO.