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參數(shù)資料
| 型號： | XC5VFX130T-2FFG1738C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA VIRTEX-5FX 130K 1738FBGA |
| 標準包裝： | 1 |
| 系列： | Virtex®-5 FXT |
| LAB/CLB數(shù)： | 10240 |
| 邏輯元件/單元數(shù)： | 131072 |
| RAM 位總計： | 10985472 |
| 輸入/輸出數(shù)： | 840 |
| 電源電壓： | 0.95 V ~ 1.05 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 1738-BBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 1738-FCBGA |
| 配用： | 568-5088-ND - BOARD DEMO DAC1408D750 HW-V5-ML510-G-ND - BOARD EVAL FOR VIRTEX-5 ML510 |
Virtex-5 Family Overview
DS100 (v5.0) February 6, 2009
Product Specification
5
R
RocketIO GTP Transceivers (LXT/SXT only)
Full-duplex serial transceiver capable of 100 Mb/s to
3.75 Gb/s baud rates
8B/10B, user-defined FPGA logic, or no encoding
options
Channel bonding support
CRC generation and checking
Programmable pre-emphasis or pre-equalization for
the transmitter
Programmable termination and voltage swing
Programmable equalization for the receiver
Receiver signal detect and loss of signal indicator
User dynamic reconfiguration using secondary
configuration bus
Out of Band (OOB) support for Serial ATA (SATA)
Electrical idle, beaconing, receiver detection, and PCI
Express and SATA spread-spectrum clocking support
Less than 100 mW typical power consumption
Built-in PRBS Generators and Checkers
RocketIO GTX Transceivers (TXT/FXT only)
Full-duplex serial transceiver capable of 150 Mb/s to
6.5 Gb/s baud rates
8B/10B encoding and programmable gearbox to
support 64B/66B and 64B/67B encoding, user-defined
FPGA logic, or no encoding options
Channel bonding support
CRC generation and checking
Programmable pre-emphasis or pre-equalization for
the transmitter
Programmable termination and voltage swing
Programmable continuous time equalization for the
receiver
Programmable decision feedback equalization for the
receiver
Receiver signal detect and loss of signal indicator
User dynamic reconfiguration using secondary
configuration bus
OOB support (SATA)
Electrical idle, beaconing, receiver detection, and
PCI Express spread-spectrum clocking support
Low-power operation at all line rates
PowerPC 440 RISC Cores (FXT only)
Embedded PowerPC 440 (PPC440) cores
Up to 550 MHz operation
Greater than 1000 DMIPS per core
Seven-stage pipeline
Multiple instructions per cycle
Out-of-order execution
32 Kbyte, 64-way set associative level 1 instruction
cache
32 Kbyte, 64-way set associative level 1 data cache
Book E compliant
Integrated crossbar for enhanced system performance
128-bit Processor Local Buses (PLBs)
Integrated scatter/gather DMA controllers
Dedicated interface for connection to DDR2 memory
controller
Auto-synchronization for non-integer PLB-to-CPU clock
ratios
Auxiliary Processor Unit (APU) Interface and Controller
Direct connection from PPC440 embedded block to
FPGA fabric-based coprocessors
128-bit wide pipelined APU Load/Store
Support of autonomous instructions: no pipeline stalls
Programmable decode for custom instructions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC5VFX130T-2FFG1738CES | 制造商:Xilinx 功能描述: |
| XC5VFX130T-2FFG1738I | 功能描述:IC FPGA VIRTEX-5FX 130K 1738FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 FXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC5VFX130T-3FF1738C | 制造商:Xilinx 功能描述:FPGA VIRTEX-5 COMM 65NM 1V 1738FCBGA - Trays 制造商:Xilinx 功能描述:IC FPGA 840 I/O 1738FCBGA 制造商:Xilinx 功能描述:IC FPGA VIRTEX5FX 130K 1738BGA |
| XC5VFX130T-3FFG1738C | 功能描述:IC FPGA VIRTEX 5 130K 1738FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-5 FXT 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標準包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC5VFX200T | 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-5 Family Overview |
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