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    參數(shù)資料
    型號: XC5215-4HQ240I
    英文描述: Field Programmable Gate Array (FPGA)
    中文描述: 現(xiàn)場可編程門陣列(FPGA)
    文件頁數(shù): 45/73頁
    文件大?。?/td> 598K
    代理商: XC5215-4HQ240I
    R
    November 5, 1998 (Version 5.2)
    7-127
    XC5200 Series Field Programmable Gate Arrays
    7
    XC5200 Switching Characteristics
    Definition of Terms
    In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as
    follows:
    Advance:
    Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or device
    families. Use as estimates, not for production.
    Preliminary:
    Based on preliminary characterization. Further changes are not expected.
    Unmarked:
    Specifications not identified as either Advance or Preliminary are to be considered Final.
    1
    XC5200 Operating Conditions
    XC5200 DC Characteristics Over Operating Conditions
    XC5200 Absolute Maximum Ratings
    1. Notwithstanding the definition of the above terms, all specifications are subject to change without notice.
    Symbol
    V
    CC
    Description
    Min
    4.75
    4.5
    2.0
    0
    70%
    0
    Max
    5.25
    5.5
    V
    CC
    0.8
    100%
    20%
    250
    Units
    V
    V
    V
    V
    V
    CC
    V
    CC
    ns
    Supply voltage relative to GND Commercial: 0
    °
    C to 85
    °
    C junction
    Supply voltage relative to GND Industrial: -40
    °
    C to 100
    °
    C junction
    High-level input voltage — TTL configuration
    Low-level input voltage — TTL configuration
    High-level input voltage — CMOS configuration
    Low-level input voltage — CMOS configuration
    Input signal transition time
    V
    IHT
    V
    ILT
    V
    IHC
    V
    ILC
    T
    IN
    Symbol
    V
    OH
    V
    OL
    I
    CCO
    I
    IL
    C
    IN
    I
    RIN
    Note:
    Description
    Min
    3.86
    Max
    Units
    V
    V
    mA
    μ
    A
    pF
    mA
    High-level output voltage @ I
    OH
    = -8.0 mA, V
    CC
    min
    Low-level output voltage @ I
    OL
    = 8.0 mA, V
    CC
    max
    Quiescent FPGA supply current (Note 1)
    Leakage current
    Input capacitance (sample tested)
    Pad pull-up (when selected) @ V
    IN
    = 0V (sample tested)
    1. With no output current loads, all package pins at Vcc or GND, either TTL or CMOS inputs, and the FPGA configured with a
    tie option.
    0.4
    15
    +10
    15
    0.30
    -10
    0.02
    Symbol
    V
    CC
    V
    IN
    V
    TS
    T
    STG
    T
    SOL
    T
    J
    Description
    Units
    V
    V
    V
    °
    C
    °
    C
    °
    C
    °
    C
    Supply voltage relative to GND
    Input voltage with respect to GND
    Voltage applied to 3-state output
    Storage temperature (ambient)
    Maximum soldering temperature (10 s @ 1/16 in. = 1.5 mm)
    Junction temperature in plastic packages
    Junction temperature in ceramic packages
    Note:
    Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
    ratings only, and functional operation of the device at these or any other conditions beyond those listed under Recommended
    Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may
    affect device reliability.
    -0.5 to +7.0
    -0.5 to V
    CC
    +0.5
    -0.5 to V
    CC
    +0.5
    -65 to +150
    +260
    +125
    +150
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