參數(shù)資料
型號: XC5210-4VQ100C
廠商: Xilinx, Inc.
英文描述: Field Programmable Gate Arrays
中文描述: 現(xiàn)場可編程門陣列
文件頁數(shù): 20/73頁
文件大小: 598K
代理商: XC5210-4VQ100C
R
November 5, 1998 (Version 5.2)
7-109
XC5200 Series Field Programmable Gate Arrays
7
XC4000E/EX
XC5200/
UCLK_SYNC
XC4000E/EX
XC5200/
UCLK_NOSYNC
XC4000E/EX
XC5200/
CCLK_SYNC
XC4000E/EX
XC5200/
CCLK_NOSYNC
XC3000
XC2000
CCLK
GSR Active
UCLK Period
DONE IN
Di
Di+1
Di+2
Di
Di+1
Di+2
U2
U3
U4
U2
U3
U4
U2
U3
U4
C1
Synchronization
Uncertainty
Di
Di+1
Di
Di+1
DONE
I/O
GSR Active
DONE
I/O
GSR Active
DONE
C1
C2
C1
U2
C3
C4
C2
C3
C4
C2
C3
C4
I/O
GSR Active
DONE
I/O
DONE
Global Reset
I/O
DONE
Global Reset
I/O
F = Finished, no more
configuration clocks needed
Daisy-chain lead device
must have latest F
Heavy lines describe
default timing
CCLK Period
Length Count Match
F
X6700
C1, C2 or C3
Figure 25: Start-up Timing
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