參數(shù)資料
型號(hào): XC5210-4PQ100C
廠商: Xilinx, Inc.
英文描述: Field Programmable Gate Arrays
中文描述: 現(xiàn)場(chǎng)可編程門陣列
文件頁數(shù): 46/73頁
文件大?。?/td> 598K
代理商: XC5210-4PQ100C
R
XC5200 Series Field Programmable Gate Arrays
7-132
November 5, 1998 (Version 5.2)
XC5200 Boundary Scan (JTAG) Switching Characteristic Guidelines
The following guidelines reflect worst-case values over the recommended operating conditions. They are expressed in units
of nanoseconds and apply to all XC5200 devices unless otherwise noted.
Speed Grade
-6
-5
-4
-3
Description
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Setup and Hold
Input (TDI) to clock (TCK)
setup time
Input (TDI) to clock (TCK)
hold time
Input (TMS) to clock (TCK)
setup time
Input (TMS) to clock (TCK)
hold time
TTDITCK
TTCKTDI
TTMSTCK
TTCKTMS
30.0
0
15.0
0
30.0
0
15.0
0
30.0
0
15.0
0
30.0
0
15.0
0
Propagation Delay
Clock (TCK) to Pad (TDO)
TTCKPO
30.0
Clock
Clock (TCK) High
Clock (TCK) Low
TTCKH
TTCKL
30.0
FMAX (MHz)
FMAX
10.0
Note 1:
Input pad setup and hold times are specified with respect to the internal clock.
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