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| 型號(hào)： | XC3S1200E-4FGG320I |
| 廠(chǎng)商： | Xilinx Inc |
| 文件頁(yè)數(shù)： | 19/227頁(yè) |
| 文件大小： | 0K |
| 描述： | IC FPGA SPARTAN-3E 1200K 320FBGA |
| 標(biāo)準(zhǔn)包裝： | 84 |
| 系列： | Spartan®-3E |
| LAB/CLB數(shù)： | 2168 |
| 邏輯元件/單元數(shù)： | 19512 |
| RAM 位總計(jì)： | 516096 |
| 輸入/輸出數(shù)： | 250 |
| 門(mén)數(shù)： | 1200000 |
| 電源電壓： | 1.14 V ~ 1.26 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 320-BGA |
| 供應(yīng)商設(shè)備封裝： | 320-FBGA（19x19） |
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DS312 (v4.1) July 19, 2013
Product Specification
115
Copyright 2005–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, Artix, Kintex, Zynq, Vivado, and other designated brands included herein are trademarks of Xilinx
in the United States and other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DC Electrical Characteristics
In this section, specifications may be designated as
Advance, Preliminary, or Production. These terms are
defined as follows:
Advance: Initial estimates are based on simulation, early
characterization, and/or extrapolation from the
characteristics of other families. Values are subject to
change. Use as estimates, not for production.
Preliminary: Based on characterization. Further changes
are not expected.
Production: These specifications are approved once the
silicon has been characterized over numerous production
lots. Parameter values are considered stable with no future
changes expected.
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. Unless
otherwise noted, the published parameter values apply
to all Spartan-3E devices. AC and DC characteristics
are specified using the same numbers for both
commercial and industrial grades.
Absolute Maximum Ratings
Maximum Ratings may cause permanent damage to the
device. These are stress ratings only; functional operation
of the device at these or any other conditions beyond those
listed under the Recommended Operating Conditions is not
implied. Exposure to absolute maximum conditions for
extended periods of time adversely affects device reliability.
156
Spartan-3E FPGA Family:
DC and Switching Characteristics
DS312 (v4.1) July 19, 2013
Product Specification
Table 73: Absolute Maximum Ratings
Symbol
Description
Conditions
Min
Max
Units
VCCINT
Internal supply voltage
–0.5
1.32
V
VCCAUX
Auxiliary supply voltage
–0.5
3.00
V
VCCO
Output driver supply voltage
–0.5
3.75
V
VREF
Input reference voltage
–0.5
V
VIN(1,2,3,4) Voltage applied to all User I/O pins and
Dual-Purpose pins
Driver in a
high-impedance
state
Commercial
–0.95
4.4
V
Industrial
–0.85
4.3
V
Voltage applied to all Dedicated pins
All temp. ranges
–0.5
V
IIK
Input clamp current per I/O pin
–0.5 V
< VIN < (VCCO + 0.5 V)
–
±100
mA
VESD
Electrostatic Discharge Voltage
Human body model
–
±2000
V
Charged device model
–
±500
V
Machine model
–
±200
V
TJ
Junction temperature
–125
°C
TSTG
Storage temperature
–65
150
°C
Notes:
1.
Each of the User I/O and Dual-Purpose pins is associated with one of the four banks’ VCCO rails. Keeping VIN within 500 mV of the
associated VCCO rails or ground rail ensures that the internal diode junctions do not turn on. Table 77 specifies the VCCO range used to
evaluate the maximum VIN voltage.
2.
Input voltages outside the -0.5V to VCCO + 0.5V (or VCCAUX + 0.5V) voltage range are require the IIK input diode clamp diode rating is met
and no more than 100 pins exceed the range simultaneously. Prolonged exposure to such current may compromise device reliability. A
sustained current of 10 mA will not compromise device reliability. See XAPP459: Eliminating I/O Coupling Effects when Interfacing
Large-Swing Single-Ended Signals to User I/O Pins on Spartan-3 Families for more details.
3.
All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) draw power from the VCCAUX rail (2.5V). Meeting the VIN max limit ensures
that the internal diode junctions that exist between each of these pins and the VCCAUX rail do not turn on. Table 77 specifies the VCCAUX
range used to evaluate the maximum VIN voltage. As long as the VIN max specification is met, oxide stress is not possible.
4.
See XAPP459: Eliminating I/O Coupling Effects when Interfacing Large-Swing Single-Ended Signals to User I/O Pins on Spartan-3
Families.
5.
For soldering guidelines, see UG112: Device Packaging and Thermal Characteristics and XAPP427: Implementation and Solder Reflow
Guidelines for Pb-Free Packages.
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