參數(shù)資料
型號： XC3064
廠商： Xilinx, Inc.
英文描述： Logic Cell Array Families
中文描述： 家庭邏輯單元陣列
文件頁數(shù)： 23/50頁
文件大?。?/td> 474K
代理商： XC3064
2-125
Serial Data In
CCLK
(Output)
Serial DOUT
(Output)
1
T
DSCK
2
T
CKDS
n
n + 1
n + 2
n – 3
n – 2
n – 1
n
X3223
Master Serial Mode Programming Switching Characteristics
Speed Grade
Min
Max
Units
Description
Symbol
CCLK
Data In setup
Data In hold
1
2
T
DSCK
60
0
ns
ns
CKDS
Notes: 1. At power-up, V
CC
must rise from 2.0 V to V
CC
min in less than 25 ms. If this is not possible, configuration can be
delayed by holding RESET Low until V
CC
has reached 4.0 V (2.5 V for the XC3000L). A very long V
CC
rise time of
>100 ms, or a non-monotonically rising V
CC
may require >6-
μ
s High level on RESET, followed by a >6-
μ
s Low
level on RESET and D/P after V
CC
has reached 4.0 V (2.5 V for the XC3000L).
2. Configuration can be controlled by holding RESET Low with or until after the INIT of all daisy-chain slave-mode
devices is High.
3. Master-serial-mode timing is based on slave-mode testing.
相關(guān)PDF資料
PDF描述
XC3090 Logic Cell Array Families
XC3100 Logic Cell Array Families
XC3042A-6PC84C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3042A-7PC84C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3190A-1PP175C Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3064100PC84C 制造商:XILINX 功能描述:NEW
XC3064-100PC84C 制造商:Xilinx 功能描述: 制造商:Xilinx 功能描述:Field-Programmable Gate Array, 224 Cell, 84 Pin, Plastic, PLCC
XC3064-100PC84I 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
XC3064-100PG132M 制造商:Xilinx 功能描述:
XC3064-100PP132C 制造商:Xilinx 功能描述:
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