參數(shù)資料
型號: XC2V250-5FGG456C
廠商: Xilinx Inc
文件頁數(shù): 310/318頁
文件大小: 0K
描述: IC FPGA VIRTEX-II 250K 456-FBGA
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標準包裝: 60
系列: Virtex®-II
LAB/CLB數(shù): 384
RAM 位總計: 442368
輸入/輸出數(shù): 200
門數(shù): 250000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 456-BBGA
供應(yīng)商設(shè)備封裝: 456-FBGA
Virtex-II Platform FPGAs: DC and Switching Characteristics
R
DS031-3 (v3.5) November 5, 2007
Module 3 of 4
Product Specification
43
08/01/03
3.0
Table 13: All Virtex-II devices and speed grades now Production.
Characteristics tables, based on values extracted from speedsfile version 1.116.
Table 34 and Table 35: Revised test setup footnote to refer to Figure 1. Previously
specified a capacitive load parameter.
Figure 1: Added note to figure regarding termination resistors.
10/14/03
3.1
Table 1: Changed TJ description from “Operating junction temperature” to “Maximum
junction temperature”.
In section General Power Supply Requirements, replaced reference to Answer Record
11713 with reference to XAPP689 regarding handling of simultaneously switching
outputs (SSO).
-
-
-Replaced Figure 1, Generalized Test Setup, with new drawing.
-
Revised and extended text describing output delay measurement procedure.
Table 45, Table 47, and Table 48: All Source-Synchronous parameters for all devices
now available in these tables.
XC2V8000 is no longer offered in the -6 speed grade. The following tables containing
parameters or other references to this device/grade combination were corrected
Table 39: For Input Clock Low/High Pulse Width, PSCLK and CLKIN, changed existing
Footnote (2) to new Footnote (3).
03/29/04
3.2
-
For XC2V40, added Maximum quiescent supply current specifications.
-
For all devices, updated Typical specifications for ICCINTQ and ICCAUXQ.
Section Power-On Power Supply Requirements, page 3: Added Footnote (1) qualifying
statement that power supplies can be turned on in any sequence.
Added section Configuration Timing, page 27. This section includes new timing
diagrams as well as parameter specification tables formerly included in the Virtex-II
(Global Clock Buffer S Input Setup/Hold to I1 and I2 Inputs).
Table 38, Operating Frequency Ranges: Added Footnote (4) to all four CLKIN
parameters.
Recompiled for backward compatibility with Acrobat 4 and above.
06/24/04
3.3
Table 1: Added TSOL parameters for Pb-free package devices.
03/01/05
3.4
Characteristics tables, based on values extracted from speedsfile version 1.120.
Table 2: Corrected Footnote (1) to require connecting VBATT to VCCAUX or GND if
battery is not used.
Table 3: Corrected "VREF current per bank" to "VREF current per pin."
Section Power-On Power Supply Requirements: Added word “monotonically” to
description of supply voltage ramp-on requirements. Added sentence to footnote (1)
indicating that if the stated requirements are violated, no damage to the device will
result, but configuration will probably fail.
Figure 3 and Figure 4: Corrected to show DOUT transitions driven by falling edge of
CCLK.
Date
Version
Revision
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XC2V250-5FGG456I 功能描述:IC FPGA VIRTEX-II 250K 456-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Virtex®-II 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
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