參數(shù)資料
型號： XC2V2000
廠商： Xilinx, Inc.
英文描述： Virtex-II 1.5V Field-Programmable Gate Arrays(Virtex-II 1.5V 現(xiàn)場可編程門陣列)
中文描述： 的Virtex - II 1.5V的現(xiàn)場可編程門陣列（的Virtex - II 1.5V的現(xiàn)場可編程門陣列）
文件頁數(shù)： 1/8頁
文件大小： 167K
代理商： XC2V2000
DS031-1 (v1.3) January 25, 2001
Advance Product Specification
1-800-255-7778
Module n of 4
1
2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm
.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Summary of Virtex
-II Features
Industry First Platform FPGA Solution
IP-Immersion Architecture
-
Densities from 40K to 10M system gates
-
420 MHz internal clock speed (Advance Data)
-
840+ Mb/s I/O (Advance Data)
SelectRAM Memory Hierarchy
-
3.5 Mb of True Dual-Port RAM in 18-Kbit block
SelectRAM resources
-
Up to 1.9 Mb of distributed SelectRAM
resources
-
High-performance interfaces to external memory
·
400 Mb/s DDR-SDRAM interface (Advance Data)
·
400 Mb/s FCRAM interface (Advance Data)
·
333 Mb/s QDR
-SRAM interface (Advance
Data)
·
600 Mb/s Sigma RAM interface (Advance Data)
Arithmetic Functions
-
Dedicated 18-bit x 18-bit multiplier blocks
-
Fast look-ahead carry logic chains
Flexible Logic Resources
-
Up to 122,880 internal registers / latches with
Clock Enable
-
Up to 122,880 look-up tables (LUTs) or cascadable
16-bit shift registers
-
Wide multiplexers and wide-input function support
-
Horizontal cascade chain and Sum-of-Products
support
-
Internal 3-state bussing
High-Performance Clock Management Circuitry
-
Up to 12 DCM (Digital Clock Manager) modules
·
Precise clock de-skew
·
Flexible frequency synthesis
·
High-resolution phase shifting
·
EMI reduction
-
16 global clock multiplexer buffers
Active Interconnect
Technology
-
Fourth generation segmented routing structure
-
Predictable, fast routing delay, independent of
fanout
SelectI/O-Ultra
Technology
-
Up to 1,108 user I/Os
-
19 single-ended standards and six differential
standards
-
Programmable sink current (2 mA to 24 mA) per
I/O
XCITE
Digitally Controlled Impedance (DCI) I/O:
on-chip termination resistors for single-ended I/O
standards
PCI-X @ 133 MHz, PCI @ 66 MHz and 33 MHz
compliance
Differential Signaling
·
840 Mb/s Low-Voltage Differential Signaling I/O
(LVDS) with current mode drivers
·
Bus LVDS I/O
·
Lightning Data Transport (LDT) I/O with current
driver buffers
·
Low-Voltage Positive Emitter-Coupled Logic
(LVPECL) I/O
·
Built-in DDR Input and Output registers
Proprietary high-performance SelectLink
Technology
·
High-bandwidth data path
·
Double Data Rate (DDR) link
·
Web-based HDL generation methodology
Supported by Xilinx Foundation
and Alliance
Series Development Systems
-
Integrated VHDL and Verilog design flows
-
Compilation of 10M system gates designs
-
Internet Team Design (ITD) tool
SRAM-Based In-System Configuration
-
Fast SelectMAP
configuration
-
Triple Data Encryption Standard (DES) security
option (Bitstream Encryption)
-
IEEE1532 support
-
Partial reconfiguration
-
Unlimited re-programmability
-
Readback capability
Power-Down Mode
0.15 μm 8-Layer Metal process with 0.12 μm high-
speed transistors
1.5 V (V
CCINT
) core power supply, dedicated 3.3 V
V
CCAUX
auxiliary and V
CCO
I/O power supplies
IEEE 1149.1 compatible boundary-scan logic support
Flip-Chip and Wire-Bond Ball Grid Array (BGA)
packages in three standard fine pitches (0.80mm,
1.00mm, and 1.27mm)
100% factory tested
-
-
-
-
0
Virtex-II 1.5V
Field-Programmable Gate Arrays
DS031-1 (v1.3) January 25, 2001
0
0
Advance Product Specification
R
相關(guān)PDF資料
PDF描述
XC2V1500 Virtex-II 1.5V Field-Programmable Gate Arrays(Virtex-II 1.5V 現(xiàn)場可編程門陣列)
XC2V1000 Virtex-II Platform FPGAs: Complete Data Sheet
XC2V1000-4FG456C Virtex-II Platform FPGAs: Complete Data Sheet
XC2V1000-4FG456I Virtex-II Platform FPGAs: Complete Data Sheet
XC2V8000 Virtex-II Platform FPGAs: Complete Data Sheet
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC2V2000-4BF957C 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-II 1.5V Field-Programmable Gate Arrays
XC2V2000-4BF957C0921 制造商:Xilinx 功能描述:XLXXC2V2000-4BF957C0921 IC SYSTEM GATE
XC2V2000-4BF957I 功能描述:IC FPGA VIRTEX-II 957FCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-II 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC2V2000-4BFG957C 制造商:Xilinx 功能描述:FPGA VIRTEX-II 2M GATES 24192 CELLS 650MHZ 0.15UM/0.12UM 1.5 - Trays
XC2V2000-4BFG957I 功能描述:IC FPGA VIRTEX-II 957FCBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-II 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
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