- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4230 > XC2V1000-4FFG896I (Xilinx Inc)IC FPGA VIRTEX-II 2M 896-FBGA PDF資料下載
參數(shù)資料
| 型號： | XC2V1000-4FFG896I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 57/318頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA VIRTEX-II 2M 896-FBGA |
| 產(chǎn)品變化通告： | FPGA Family Discontinuation 18/Apr/2011 |
| 標準包裝： | 1 |
| 系列： | Virtex®-II |
| LAB/CLB數(shù)： | 1280 |
| RAM 位總計： | 737280 |
| 輸入/輸出數(shù)： | 432 |
| 門數(shù)： | 1000000 |
| 電源電壓： | 1.425 V ~ 1.575 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 896-BBGA，F(xiàn)CBGA |
| 供應商設(shè)備封裝： | 896-FCBGA |
Virtex-II Platform FPGAs: Functional Description
R
DS031-2 (v3.5) November 5, 2007
Module 2 of 4
Product Specification
7
Table 5: Summary of Voltage Supply Requirements for
All Input and Output Standards
I/O Standard
VCCO
VREF
Termination Type
Output
Input
Output
Input
LVDS_33
3.3
N/R
N/R(1)
N/R
LVDSEXT_33
N/R
LVPECL_33
N/R
SSTL3_I
1.5
N/R
SSTL3_II
1.5
N/R
AGP
1.32
N/R
LVTTL
3.3
N/R
LVCMOS33
N/R
LVDCI_33
N/R
Series
N/R
LVDCI_DV2_33
N/R
Series
N/R
PCI33_3
N/R
PCI66_3
N/R
PCIX
N/R
SSTL3_I_DCI
1.5
N/R
Split
SSTL3_II_DCI
1.5
Split
LVDS_25
2.5
N/R
LVDSEXT_25
N/R
LDT_25
N/R
ULVDS_25
N/R
BLVDS_25
N/R
SSTL2_I
1.25
N/R
SSTL2_II
1.25
N/R
LVCMOS25
2.5
N/R
LVDCI_25
N/R
Series
N/R
LVDCI_DV2_25
N/R
Series
N/R
LVDS_25_DCI
N/R
Split
LVDSEXT_25_DC
I
N/R
Split
SSTL2_I_DCI
1.25
N/R
Split
SSTL2_II_DCI
1.25
Split
HSTL_III_18
1.8
N/R
1.1
N/R
HSTL_IV_18
1.1
N/R
HSTL_I_18
0.9
N/R
HSTL_II_18
0.9
N/R
SSTL18_I
0.9
N/R
SSTL18_II
0.9
N/R
LVCMOS18
1.8
N/R
LVDCI_18
N/R
Series
N/R
LVDCI_DV2_18
N/R
Series
N/R
HSTL_III_DCI_18
1.1
N/R
Single
HSTL_IV_DCI_18
1.1
Single
HSTL_I_DCI_18
0.9
N/R
Split
HSTL_II_DCI_18
0.9
Split
SSTL18_I_DCI
0.9
N/R
Split
SSTL18_II_DCI
0.9
Split
HSTL_III
1.5
N/R
0.9
N/R
HSTL_IV
0.9
N/R
HSTL_I
0.75
N/R
HSTL_II
0.75
N/R
LVCMOS15
1.5
N/R
LVDCI_15
N/R
Series
N/R
LVDCI_DV2_15
N/R
Series
N/R
GTLP_DCI
1
Single
HSTL_III_DCI
0.9
N/R
Single
HSTL_IV_DCI
0.9
Single
HSTL_I_DCI
0.75
N/R
Split
HSTL_II_DCI
0.75
Split
GTL_DCI
1.2
0.8
Single
GTLP
N/R
1N/R
N/R
GTL
0.8
N/R
Notes:
1.
N/R = no requirement.
Table 5: Summary of Voltage Supply Requirements for
All Input and Output Standards (Continued)
I/O Standard
VCCO
VREF
Termination Type
Output
Input
Output
Input
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 24AA1026T-I/SN | IC EEPROM 1024KB 400KHZ 8-SOIC |
| RMC65DRXN | CONN EDGECARD 130PS DIP .100 SLD |
| RMC65DRXH | CONN EDGECARD 130PS DIP .100 SLD |
| XC5VLX30-1FFG676I | IC FPGA VIRTEX-5 30K 676FBGA |
| SST26VF032-80-5I-S2AE | IC FLASH 32MBIT 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XC2V10004FG256C | 制造商:Xilinx 功能描述: |
| XC2V1000-4FG256C | 制造商:Xilinx 功能描述:FPGA VIRTEX-II 1M GATES 11520 CELLS 650MHZ 0.15UM/0.12UM 1.5 - Trays |
| XC2V1000-4FG256CES | 制造商:Xilinx 功能描述: |
| XC2V10004FG256I | 制造商:Xilinx 功能描述: |
| XC2V1000-4FG256I | 功能描述:IC FPGA VIRTEX-II 256FGBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex®-II 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
發(fā)布緊急采購，3分鐘左右您將得到回復。