鍨嬭櫉锛� | XC2S30-6TQ144C |
寤犲晢锛� | Xilinx Inc |
鏂囦欢闋佹暩(sh霉)锛� | 97/99闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC FPGA 2.5V C-TEMP 144-TQFP |
妯欐簴鍖呰锛� | 60 |
绯诲垪锛� | Spartan®-II |
LAB/CLB鏁�(sh霉)锛� | 216 |
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� | 972 |
RAM 浣嶇附瑷堬細 | 24576 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 92 |
闁€鏁�(sh霉)锛� | 30000 |
闆绘簮闆诲锛� | 2.375 V ~ 2.625 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | 0°C ~ 85°C |
灏佽/澶栨锛� | 144-LQFP |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 144-TQFP锛�20x20锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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24LC024HT-E/MS | IC EEPROM 2KBIT 400KHZ 8MSOP |
748610-2 | CONT, HD22 CS SCKT, 30AU |
24LC014T-E/MS | IC EEPROM 1KBIT 400KHZ 8MSOP |
XC2S30-5TQ144I | IC FPGA 2.5V I-TEMP 144-TQFP |
XC6SLX4-L1CPG196C | IC FPGA SPARTAN 6 3K 196CPGBGA |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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XC2S30-6TQ144I | 鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:Spartan-II 2.5V FPGA Family:Introduction and Ordering Information |
XC2S30-6TQG144C | 鍒堕€犲晢:Xilinx 鍔熻兘鎻忚堪:FPGA SPARTAN-II 30K GATES 972 CELLS 263MHZ 2.5V 144TQFP EP - Trays 鍒堕€犲晢:Xilinx 鍔熻兘鎻忚堪:IC SYSTEM GATE |
XC2S30-6TQG144I | 鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:Spartan-II FPGA Family |
XC2S30-6VQ100C | 鍔熻兘鎻忚堪:IC FPGA 2.5V C-TEMP 100-PQFP RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Spartan®-II 妯欐簴鍖呰:40 绯诲垪:Spartan® 6 LX LAB/CLB鏁�(sh霉):3411 閭忚集鍏冧欢/鍠厓鏁�(sh霉):43661 RAM 浣嶇附瑷�:2138112 杓稿叆/杓稿嚭鏁�(sh霉):358 闁€鏁�(sh霉):- 闆绘簮闆诲:1.14 V ~ 1.26 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:676-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:676-FBGA锛�27x27锛� |
XC2S30-6VQ100I | 鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:Spartan-II 2.5V FPGA Family:Introduction and Ordering Information |