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    參數(shù)資料
    

    


    


    
型號(hào)：
XA3SD1800A-4CSG484Q

    

    
廠(chǎng)商：
Xilinx Inc

    

    
文件頁(yè)數(shù)：
5/58頁(yè)

    

    
文件大?。?/td>
0K

    

    
描述：
SPARTAN-3ADSP FPGA 1800K 484CSBG

    

    
產(chǎn)品培訓(xùn)模塊：
Extended Spartan 3A FPGA Family
    		

    

    
標(biāo)準(zhǔn)包裝：
84

    

    
系列：
Spartan®-3A DSP XA

    

    
LAB/CLB數(shù)：
4160
    		

    

    
邏輯元件/單元數(shù)：
37440
    		

    

    
RAM 位總計(jì)：
1548288
    		

    

    
輸入/輸出數(shù)：
309
    		

    

    
門(mén)數(shù)：
1800000
    		

    

    
電源電壓：
1.14 V ~ 1.26 V
    		

    

    
安裝類(lèi)型：
表面貼裝
    		

    

    
工作溫度：
-40°C ~ 125°C
    		

    

    
封裝/外殼：
484-FBGA，CSPBGA
    		

    

    
供應(yīng)商設(shè)備封裝：
484-CSPBGA
    		

    

    
配用：
122-1574-ND - KIT DEVELOPMENT SPARTAN 3ADSP
    		

    

    

    

	
    
    
    

    
    
	
    XA Spartan-3A DSP Automotive FPGA Family Data Sheet
    DS705 (v2.0) April 18, 2011
    Product Specification
    13
    Differential I/O Standards
    HSTL_I(4)
    8–8
    0.4
    VCCO – 0.4
    24(7)
    –8
    0.4
    VCCO – 0.4
    HSTL_I_18
    8
    –8
    0.4
    VCCO – 0.4
    16
    –16(7)
    0.4
    VCCO – 0.4
    HSTL_III_18
    24(7)
    –8
    0.4
    VCCO – 0.4
    SSTL18_I
    6.7
    –6.7
    VTT – 0.475
    VTT + 0.475
    SSTL18_II(4)
    13.4
    –13.4
    VTT – 0.475
    VTT + 0.475
    SSTL2_I
    8.1
    –8.1
    VTT – 0.61
    VTT + 0.61
    16.2
    –16.2
    VTT – 0.80
    VTT + 0.80
    SSTL3_I
    8
    –8
    VTT – 0.6
    VTT + 0.6
    SSTL3_II
    16
    –16
    VTT – 0.8
    VTT + 0.8
    Notes:
    1.
    The numbers in this table are based on the conditions set forth in Table 8 and Table 11.
    2.
    Descriptions of the symbols used in this table are as follows:
    IOL – the output current condition under which VOL is tested
    IOH – the output current condition under which VOH is tested
    VOL – the output voltage that indicates a Low logic level
    VOH – the output voltage that indicates a High logic level
    VIL – the input voltage that indicates a Low logic level
    VIH – the input voltage that indicates a High logic level
    VCCO – the supply voltage for output drivers
    VREF – the reference voltage for setting the input switching threshold
    VTT – the voltage applied to a resistor termination
    3.
    For the LVCMOS and LVTTL standards: the same VOL and VOH limits apply for both the Fast and Slow slew attributes.
    4.
    These higher-drive output standards are supported only on FPGA banks 1 and 3. Inputs are unrestricted. See the chapter "Using I/O
    Resources" in UG331.
    5.
    Tested according to the relevant PCI specifications. For information on PCI IP solutions, see
    input-only pins. The PCIX IOSTANDARD is available and has equivalent characteristics, but no PCI-X IP is supported.
    6.
    Derate by 20% for TJ above 100oC
    7.
    Derate by 5% for TJ above 100oC
    X-Ref Target - Figure 4
    Figure 4: Differential Input Voltages
    Table 12: DC Characteristics of User I/Os Using Single-Ended Standards (Cont’d)
    IOSTANDARD Attribute
    Test Conditions
    Logic Level Characteristics
    IOL
    (mA)
    IOH
    (mA)
    VOL
    Max (V)
    VOH
    Min (V)
    DS705_04_041111
    V
    INN
    V
    INN
    V
    INP
    V
    INP
    GND level
    50%
    V
    ICM
    V
    ICM = Input common mode voltage =
    V
    ID
    Internal
    Logic
    Differential
    I/O Pair Pins
    N
    P
    2
    V
    INP
    + V
    INN
    V
    ID = Differential input voltage =
    V
    INP
    - V
    INN
    
    
    
    
    
    


    


    

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    相關(guān)代理商/技術(shù)參數(shù)
    		

    參數(shù)描述
    		

    
    

    
XA3SD1800A-4FGG676I
功能描述:SPARTAN-3ADSP FPGA 1800K 676FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5

    

    
XA3SD1800A-4FGG676Q
功能描述:SPARTAN-3ADSP FPGA 1800K 676FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5

    

    
XA3SD3400A
 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:XA Spartan-3A DSP Automotive FPGA Family Data Sheet

    

    
XA3SD3400A-4CSG484I
功能描述:SPARTAN-3ADSP FPGA 3400K 484CSBG RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5

    

    
XA3SD3400A-4FGG676I
功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5

    

    
    
    
    
	
    	
    
    
     
     
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