參數(shù)資料
型號: XA3S200A-4FTG256Q
廠商: Xilinx Inc
文件頁數(shù): 2/57頁
文件大小: 0K
描述: IC FPGA SPARTAN-3A 200K 256-FBGA
產(chǎn)品培訓(xùn)模塊: Extended Spartan 3A FPGA Family
標(biāo)準(zhǔn)包裝: 1
系列: Spartan®-3A XA
LAB/CLB數(shù): 448
邏輯元件/單元數(shù): 4032
RAM 位總計: 294912
輸入/輸出數(shù): 195
門數(shù): 200000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 125°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
XA Spartan-3A Automotive FPGA Family Data Sheet
DS681 (v2.0) April 22, 2011
Product Specification
10
Quiescent Current Requirements
Table 10: Quiescent Supply Current Characteristics
Symbol
Description
Device
I-Grade
Maximum(2)
Q-Grade
Maximum(2)
Units
ICCINTQ
Quiescent VCCINT supply current
XA3S200A
7
70
110
mA
XA3S400A
10
125
230
mA
XA3S700A
13
185
330
mA
XA3S1400A
24
310
580
mA
ICCOQ
Quiescent VCCO supply current
XA3S200A
0.2
3
4
mA
XA3S400A
0.3
4
5
mA
XA3S700A
0.3
4
5
mA
XA3S1400A
0.3
4
5
mA
ICCAUXQ
Quiescent VCCAUX supply current
XA3S200A
5
15
20
mA
XA3S400A
5
24
40
mA
XA3S700A
6
34
60
mA
XA3S1400A
10
58
95
mA
Notes:
1.
The numbers in this table are based on the conditions set forth in Table 8.
2.
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (TJ of 25°C at VCCINT = 1.2V, VCCO = 3.3V, and VCCAUX
= 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage
limits with VCCINT = 1.26V, VCCO = 3.6V, and VCCAUX = 3.6V. The FPGA is programmed with a “blank” configuration data file (that is, a design
with no functional elements instantiated). For conditions other than those described above (for example, a design including functional
elements), measured quiescent current levels will be different than the values in the table.
3.
There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The
Spartan-3A FPGA XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.
4.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
5.
For information on the power-saving Suspend mode, see XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs. Suspend mode
typically saves 40% total power consumption compared to quiescent current.
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