參數(shù)資料
型號: X96011V14IZ
廠商: INTERSIL CORP
元件分類: 溫度/濕度傳感器
英文描述: Temperature Sensor with Look Up Table Memory and DAC
中文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, PLASTIC, TSSOP-14
文件頁數(shù): 10/23頁
文件大?。?/td> 335K
代理商: X96011V14IZ
10
FN8215.1
October 25, 2005
PRINCIPLES OF OPERATION
CONTROL AND STATUS REGISTERS
The Control and Status Registers provide the user
with a mechanism for changing and reading the value
of various parameters of the X96011. The X96011
contains five Control, one Status, and several
Reserved registers, each being one Byte wide (See
Figure 4). The Control registers 0 through 6 are
located at memory addresses 80h through 86h
respectively. The Status register is at memory address
87h, and the Reserved registers at memory address
82h, 84h, and 88h through 8Fh.
All bits in Control register 6 always power-up to the logic
state “0”. All bits in Control registers 0 through 5 power-
up to the logic state value kept in their corresponding
nonvolatile memory cells. The nonvolatile bits of a reg-
ister retain their stored values even when the X96011 is
powered down, then powered back up. The nonvolatile
bits in Control 0 through Control 5 registers are all pre-
programmed to the logic state “0” at the factory, except
the cases that indicate “1” in Figure 1.
Bits indicated as “Reserved” are ignored when read,
and must be written as “0”, if any Write operation is
performed to their registers.
A detailed description of the function of each of the
Control and Status register bits follows:
Control Register 0
This register is accessed by performing a Read or
Write operation to address 80h of memory.
ADC
FILT
O
FF
: ADC F
ILTERING
C
ONTROL
(N
ON
-
VOLATILE
)
When this bit is “1”, the status register at 87h is
updated after every conversion of the ADC. When this
bit is “0” (default), the status register is updated after
four consecutive conversions with the same result, on
the 6 MSBs.
NV13: C
ONTROL
REGISTERS
1
AND
3
VOLATILITY
MODE
SELECTION
BIT
(N
ON
-
VOLATILE
)
When the NV13 bit is set to “0” (default), bytes written
to Control registers 1 and 3 are stored in volatile cells,
and their content is lost when the X96011 is powered
down. When the NV13 bit is set to “1”, bytes written to
Control registers 1 and 3 are stored in both volatile
and nonvolatile cells, and their value doesn’t change
when the X96011 is powered down and powered back
up. See “Writing to Control Registers” on page 21.
IDS: C
URRENT
G
ENERATOR
D
IRECTION
S
ELECT
B
IT
(N
ON
-
VOLATILE
)
The IDS bit sets the polarity of the Current Generator.
When this bit is set to “0” (default), the Current Gener-
ator of the X96011 is configured as a Current Source.
The Current Generator is configured as a Current Sink
when the IDS bit is set to “1”. See Figure 5.
X96011
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