- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376449 > X96010V14IZ (INTERSIL CORP) Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:19 x 36; Jacket Color:Purple; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes PDF資料下載
參數(shù)資料
| 型號： | X96010V14IZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Hook-Up Wire; Conductor Size AWG:24; No. Strands x Strand Size:19 x 36; Jacket Color:Purple; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO14 |
| 封裝： | LEAD FREE, TSSOP-14 |
| 文件頁數(shù)： | 22/26頁 |
| 文件大?。?/td> | 372K |
| 代理商： | X96010V14IZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當(dāng)前第22頁第23頁第24頁第25頁第26頁
22
FN8214.1
October 25, 2005
Slave Address Byte
Following a START condition, the master must output
a Slave Address Byte (Refer to figure 15.). This byte
includes three parts:
– The four MSBs (SA7 - SA4) are the Device Type
Identifier, which must always be set to 1010 in order
to select the X96010.
– The next three bits (SA3 - SA1) are the Device
Address bits (AS2 - AS0). To access any part of the
X96010’s memory, the value of bits AS2, AS1, and
AS0 must correspond to the logic levels at pins A2,
A1, and A0 respectively.
– The LSB (SA0) is the R/W bit. This bit defines the
operation to be performed on the device being
addressed. When the R/W bit is “1”, then a Read
operation is selected. A “0” selects a Write
operation (Refer to figure 15.)
Nonvolatile Write Acknowledge Polling
After a nonvolatile write command sequence is cor-
rectly issued (including the final STOP condition), the
X96010 initiates an internal high voltage write cycle.
This cycle typically requires 5 ms. During this time,
any Read or Write command is ignored by the
X96010. Write Acknowledge Polling is used to deter-
mine whether a high voltage write cycle is completed.
During acknowledge polling, the master first issues a
START condition followed by a Slave Address Byte.
The Slave Address Byte contains the X96010’s Device
Type Identifier and Device Address. The LSB of the
Slave Address (R/W) can be set to either 1 or 0 in this
case. If the device is busy within the high voltage
cycle, then no ACK is returned. If the high voltage
cycle is completed, an ACK is returned and the master
can then proceed with a new Read or Write operation.
(Refer to figure 16.).
Byte Write Operation
In order to perform a Byte Write operation to the mem-
ory array, the Write Enable Latch (WEL) bit of the Con-
trol 6 Register must first be set to “1”. (See “WEL:
Write Enable Latch (Volatile)” on page 13.)
For any Byte Write operation, the X96010 requires the
Slave Address Byte, an Address Byte, and a Data
Byte (See Figure 17). After each of them, the X96010
responds with an ACK. The master then terminates
the transfer by generating a STOP condition. At this
time, if all data bits are volatile, the X96010 is ready for
the next read or write operation. If some bits are non-
volatile, the X96010 begins the internal write cycle to
the nonvolatile memory. During the internal nonvolatile
write cycle, the X96010 does not respond to any
requests from the master. The SDA output is at high
impedance.
A Byte Write operation can access bytes at locations
80h through FEh directly, when setting the Address
Byte to 80h through FEh respectively. Setting the
Address Byte to FFh accesses the byte at location
100h. The other sixteen bytes, at locations FFh and
101h through 10Fh can only be accessed using Page
Write operations. The byte at location FFh can only be
written using a “Page Write” operation.
Writing to Control bytes which are located at byte
addresses 80h through 8Fh is a special case
described in the section “Writing to Control Registers” .
ACK returned
Issue Slave Address
Byte (Read or Write)
Byte load completed by issuing
STOP. Enter ACK Polling
Issue STOP
Issue START
NO
YES
NO
Continue normal Read or Write
command sequence
PROCEED
YES
complete. Continue command
sequence.
High Voltage
Issue STOP
Figure 16. Acknowledge Polling Sequence
X96010
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X96011 | Temperature Sensor with Look Up Table Memory and DAC(溫度傳感器，帶雙查找表存儲器及DAC) |
| X96011V14I | Temperature Sensor with Look Up Table Memory and DAC |
| X96011V14IZ | Temperature Sensor with Look Up Table Memory and DAC |
| X96012V14I | Universal Sensor Conditioner with Dual Look Up Table Memory and DACs |
| X96012 | Universal Sensor Conditioner with Dual Look-up Table Memory and DACs(通用傳感器調(diào)節(jié)器，帶雙查找表存儲器及DACs) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X96011 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Temperature Sensor with Look-Up Table Memory and DAC |
| X96011_08 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Temperature Sensor with Look-Up Table Memory and DAC |
| X96011V14I | 功能描述:CONDITIONER SGNL W/TABLE MEM&DAC RoHS:否 類別:集成電路 (IC) >> PMIC - 熱管理 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 功能:溫度監(jiān)控系統(tǒng)（傳感器） 傳感器類型:內(nèi)部和外部 感應(yīng)溫度:-40°C ~ 125°C，外部傳感器 精確度:±2.5°C 本地（最大值），±5°C 遠(yuǎn)程（最大值） 拓?fù)?ADC，比較器，寄存器庫 輸出類型:2 線 SMBus? 輸出警報(bào):無 輸出風(fēng)扇:無 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 供應(yīng)商設(shè)備封裝:SOT-23-8 包裝:Digi-Reel® 其它名稱:296-22675-6 |
| X96011V14IZ | 功能描述:IC SENSOR TEMP BIAS SGL 14-TSSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 熱管理 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 功能:溫度監(jiān)控系統(tǒng)（傳感器） 傳感器類型:內(nèi)部和外部 感應(yīng)溫度:-40°C ~ 125°C，外部傳感器 精確度:±2.5°C 本地（最大值），±5°C 遠(yuǎn)程（最大值） 拓?fù)?ADC，比較器，寄存器庫 輸出類型:2 線 SMBus? 輸出警報(bào):無 輸出風(fēng)扇:無 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 供應(yīng)商設(shè)備封裝:SOT-23-8 包裝:Digi-Reel® 其它名稱:296-22675-6 |
| X96012 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Universal Sensor Conditioner with Dual Look-up Table Memory and DACs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。