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  • 參數(shù)資料
    型號(hào): X9455TV24I-2.7
    廠商: Intersil
    文件頁(yè)數(shù): 4/19頁(yè)
    文件大?。?/td> 0K
    描述: IC DCP DUAL 100K 256TAP 24-TSSOP
    標(biāo)準(zhǔn)包裝: 62
    系列: XDCP™
    接片: 256
    電阻(歐姆): 100k
    電路數(shù): 2
    溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
    存儲(chǔ)器類型: 非易失
    接口: 9 線串行(芯片選擇,設(shè)備位址,動(dòng)觸點(diǎn)位址)
    電源電壓: 2.7 V ~ 5.5 V
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
    供應(yīng)商設(shè)備封裝: 24-TSSOP
    包裝: 管件
    12
    FN8202.1
    July 28, 2006
    Slave Address Byte
    Following a START condition, the master must output a
    Slave Address Byte (Refer to figure 4.). This byte includes
    three parts:
    The four MSBs (SA7-SA4) are the Device Type Identifier,
    which must always be set to 0101 in order to select the
    X9455.
    The next three bits (SA3-SA1) are the Device Address bits
    (AS2-AS0). To access any part of the X9455’s memory,
    the value of bits AS2, AS1, and AS0 must correspond to
    the logic levels at pins A2, A1, and A0 respectively.
    The LSB (SA0) is the R/W bit. This bit defines the
    operation to be performed on the device being addressed.
    When the R/W bit is “1”, then a Read operation is
    selected. A “0” selects a Write operation
    .
    Nonvolatile Write Acknowledge Polling
    After a nonvolatile write command sequence is correctly
    issued (including the final STOP condition), the X9455
    initiates an internal high voltage write cycle. This cycle
    typically requires 5 ms. During this time, any Read or Write
    command is ignored by the X9455. Write Acknowledge
    Polling is used to determine whether a high voltage write
    cycle is completed.
    During acknowledge polling, the master first issues a START
    condition followed by a Slave Address Byte. The Slave
    Address Byte contains the X9455’s Device Type Identifier
    and Device Address. The LSB of the Slave Address (R/W)
    can be set to either 1 or 0 in this case. If the device is busy
    within the high voltage cycle, then no ACK is returned. If the
    high voltage cycle is completed, an ACK is returned and the
    master can then proceed with a new Read or Write
    2-Wire Serial Interface Operation
    X9455 Digital Potentiometer Register Organization
    Refer to the Functional Diagram on page 1. There are 2
    Digital Potentiometers, referred to as DCP0, and DCP1.
    Each potentiometer has two volatile Wiper Control Registers
    (WCRs). Each wiper has four non-volatile registers to store
    wiper position or general data. See Table 2 for register
    numbering.
    SA6
    SA7
    SA5
    SA3
    SA2
    SA1
    SA0
    Device Type
    Identifier
    Read or
    SA4
    SLAVE ADDRESS
    BIT(S)
    DESCRIPTION
    SA7-SA4
    Device Type Identifier
    SA3-SA1
    Device Address
    SA0
    Read or Write Operation Select
    R/W
    01
    0
    1
    Address
    Device
    AS0
    AS1
    AS2
    Write
    FIGURE 4. SLAVE ADDRESS (SA) FORMAT
    ACK returned?
    Issue Slave Address
    Byte (Read or Write)
    Byte load completed by issuing
    STOP. Enter ACK Polling
    Issue STOP
    Issue START
    NO
    YES
    NO
    Continue normal Read or Write
    command sequence
    PROCEED
    YES
    complete. Continue command
    sequence.
    High Voltage
    Issue STOP
    FIGURE 5. ACKNOWLEDGE POLLING SEQUENCE
    X9455
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