參數(shù)資料
型號: X93154UU8IZ-3
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Digitally Controlled Potentiometer
中文描述: 50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 32 POSITIONS, PDSO8
封裝: 2.50 X 2 MM, ROHS COMPLIANT, PLASTIC, TDFN-8
文件頁數(shù): 4/9頁
文件大?。?/td> 271K
代理商: X93154UU8IZ-3
4
FN8180.2
October 5, 2005
Test Circuit #1
Circuit #2 SPICE Macro Model
Power Up and Down Requirements
There are no restrictions on the power-up or power-down
conditions of V
CC
and the voltages applied to the
potentiometer pins provided that V
CC
is always more
positive than or equal to V
H
and V
L
, i.e., V
CC
V
H,
V
L
. The
V
CC
ramp rate spec is always in effect.
A.C. Timing
Endurance and Data Retention
PARAMETER
MIN
UNIT
Minimum endurance
200,000
Data changes per bit
Data retention
100
Years
V
L
Test Point
V
H
/R
H
A.C. Conditions of Test
Input pulse levels
0V to 3V
Input rise and fall times
10ns
Input reference levels
1.5V
C
H
C
L
10pF
10pF
R
H
R
TOTAL
C
W
25pF
R
L
AC Electrical Specifications
Over recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
MIN
TYP(6)
MAX
UNIT
t
Cl
CS to INC setup
100
ns
t
lD
INC HIGH to U/D change
100
ns
t
DI
U/D to INC setup
100
ns
t
lL
INC LOW period
1
μs
t
lH
INC HIGH period
1
μs
t
lC
INC Inactive to CS inactive
1
μs
t
CPH
CS Deselect time (NO STORE)
250
ns
t
CPH
CS Deselect time (STORE)
10
ms
t
CYC
t
R
, t
F(7)
t
R
V
CC(7)
INC cycle time
2
μs
INC input rise and fall time
500
μs
VCC power-up rate
1.0
10,000
V/ms
t
WR
Store cycle
5
10
ms
CS
INC
U/D
t
CI
t
IL
t
IH
t
CYC
t
ID
t
DI
t
IC
t
CPH
t
F
t
R
10%
90%
90%
(Store)
X93154
相關PDF資料
PDF描述
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