參數(shù)資料
型號: X84160EG-2.5
廠商: IC MICROSYSTEMS Sdn. Bhd.
元件分類: DRAM
英文描述: Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection
中文描述: 公安部⑩高級微端口保護程序區(qū)塊可鎖定的EEPROM⑩保護
文件頁數(shù): 5/22頁
文件大小: 571K
代理商: X84160EG-2.5
ObsoeePoduc
X84160/640/128
5
CONTROL REGISTER
The X84160/640/128 has one register that contains
control bits for the devices. The control bits, WPEN, BP1,
contents of this register requires a one byte operation to
address FFFFh.
A read from FFFFh returns the one byte contents of the
control register unused bits return 0. Continued reads
return undefined data. A write to address FFFFh changes
the value of the bits. Unused bits are written as “0”.
Writing more than one byte to the control register is a
violation and the operation will be aborted. After sending
one byte to the control register, a start nonvolatile write
cycle will latch in the new state.
Table 1
WPEN: Write Protect Enable Bit
The Write-Protect-Enable (WPEN) bit is an enable bit for
the WP pin.
Table 2
7
6
0
5
0
4
0
3
2
1
0
0
0
WPEN
BP1
BP0
WPEN
WP
Protected
Blocks
Unprotected
Blocks
Status
Register
0
X
Protected
Writable
Writable
1
LOW
Protected
Writable
Protected
X
HIGH
Protected
Writable
Writable
The Write Protect (WP) pin and the nonvolatile Write
Protect Enable (WPEN) bit in the Status Register control
the programmable hardware write protect feature.
Hardware write protection is enabled when WP pin is
is disabled when either the WP pin is HIGH or the WPEN
bit is “0”. When the chip is hardware write protected,
nonvolatile write is disabled to the Control Register,
including the Block Protect bits and the WPEN bit itself,
as well as the block-protected sections in the memory
array. Only the sections of the memory array that are not
block-protected can be written.
Note:
When the WP pin is tied to V
WPEN bit is write protected. It cannot be changed back to a
“0”, as long as the WP pin is held LOW.
SS
and the WPEN bit is HIGH, the
BP1, BP0: Block Protect Bits
The Block Protect (BP0 and BP1) bits are nonvolatile and
allow the user to select one of four levels of protection.
The X84160/640/128 is divided into four segments. One,
two, or all four of the segments may be protected. That is,
the user may read the segments but will be unable to
alter (write) data within the selected segments. The
partitioning is controlled as illustrated in table 3 below.
Table 3. Block Lock Protection
Control Register Bits
BP1
0
0
1
Array Address Protected
X84640
None
1800h–1FFFh
1000h–1FFFh
BP0
0
1
0
X84160
None
0600h–07FFh
0400h–07FFh
X84128
None
3000h–3FFFh
2000h–3FFFh
Array
upper 1/4
upper 1/2
Full Array
(Not including the
control register.)
1
1
0000–07FFh
0000–1FFFh
0000h–3FFFh
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X84160I 制造商:ICMIC 制造商全稱:IC MICROSYSTEMS 功能描述:Advanced MPS⑩ Micro Port Saver EEPROM with Block Lock⑩ Protection
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