參數(shù)資料
型號: X79001V20I
廠商: INTERSIL CORP
元件分類: DAC
英文描述: NV DAC with Selectable Output Range and Memory
中文描述: SERIAL INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁數(shù): 13/18頁
文件大?。?/td> 270K
代理商: X79001V20I
13
FN8147.0
March 17, 2005
Table 1. Control Registers
IDENTIFICATION AND MEMORY ADDRESS BYTES
The first byte sent to the X79000, following a falling edge
at the CS pin, is called the “Identification Byte”. The most
significant bit (ID7) is the function selector bit. The next
six bits (ID6-ID1) are the Device Address bits (AS5-AS0).
To communicate to the X79000, the value of bits AS[5:0]
must correspond to the logic levels at pins A5, A4, A3,
A2, A1, and A0 respectively. If one or more of the
address pins doesn’t exist in a particular device, then the
corresponding device address bits must be set to “0”.
The LSB (ID0) is the R/W bit. This bit defines the
operation to be performed on the device being
addressed. When the R/W bit is “1”, then a Read
operation is selected. A “0” selects a write operation.
If the value of the Device Address bits doesn’t match the
logic levels at the Address pins, then the Read or Write
operation is aborted.
The byte sent to the X79000, immediately following the
Identification byte, is called the Memory Address Byte.
The value of this byte is the location of the first byte to
be written to, or read from the X79000. Valid values for
this byte are from 00h to 3Fh. If the value of the
“Memory Address byte” is invalid, the Read or Write
operation is aborted.
Byte
MSB
LSB
38h
Register
Name
MSBs of DAC
Register
DAC5
DAC4
DAC10
DAC9
DAC11
DAC8
DAC7
DAC6
Volatile or
Non-volatile
39h
Volatile or
Non-volatile
DAC3
DAC2
DAC1
DAC0
Reserved
Reserved
Reserved
Reserved
3Ch
Configuration
Register
VH2
VH1
VH0
VL2
VL1
VL0
Count8
Count10
NVDAC
Reserved
Reserved Reserved
Reserved
Reserved
Reserved
Reserved
7
6
5
4
3
2
1
0
Address
Zero Level Configuration
000: External VL reference
001: 151mV
010: 605mV
011: 1.21V
100: 1.815V
101: 2.42V
110, 111: Reserved
Counter Configuration
(for Up/Down Operation)
00: 12 bits
01: 10 bits
10: 8 bits
11: Reserved
LSBs of DAC
Register
3Fh
Volatile
Non-Volatile
Full Scale Configuration
000: External VH reference
001: 605mV
010: 1.21V
011: 1.815V
100: 2.42V
101: 3.025V
110, 111: Reserved
Bytes at addresses 3Ah, 3Bh, 3Dh, and 3Eh are reserved.
Non-Volatile
Write Enable
ID6
ID7
ID5
ID3
ID2
ID1
ID0
Read or
Write
ID4
Slave Address
Bit(s)
ID7
ID6-ID1
ID0
Description
Function Selector bit
Device Address
Read or Write Operation Select
R/W
1
AS5
AS4
AS3
Address
Device
AS0
AS1
AS2
X79000, X79001, X79002
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