參數(shù)資料
型號: X4165S8
廠商: INTERSIL CORP
元件分類: 電源管理
英文描述: CPU Supervisor with 16K EEPROM
中文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝: SOIC-8
文件頁數(shù): 8/23頁
文件大小: 118K
代理商: X4165S8
X46402
Characteristics subject to change without notice.
8 of 23
Figure 7. X46402 Device Operation (Non-Password
Protected Areas)
Tamper Counter
The X46402 contains a tamper counter. The entry of
an invalid password increments the counter. This oper-
ation requires an internal nonvolatile cycle, requiring
up to 10 ms to complete. To minimize the possibility of
of an unauthorized person monitoring the device cur-
rent to detect the enry of the correct password, an
internal high voltage cycle is initiated even when the
counter does not increment. As such, each password
entry requires up to 10ms to acknowledge, so a long
period of time would be required to correctly guess the
password.
The Tamper Counter increments with each incorrect
password attempt and cannot be reset, except by the
Reset Device Command. When the tamper counter
overflows, the device is “l(fā)ocked”. In the locked condi-
tion, none of the password commands respond except
Reset Device. No-password commands are always
available. The device is reset by the Reset Device com-
mands.
Device Protocol
The X46402 supports a bidirectional bus oriented pro-
tocol. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device
as a receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers and pro-
vide the clock for both transmit and receive operations.
Therefore, the X46402 will be considered a slave in all
applications.
After each byte written to or read from the X46402, the
address pointer is incremented by 1. This allows the
user to read from the entire device after sending only a
single address. It also allows an entire page to be writ-
ten in one operation. An exception to this address
incrementation occurs during a read. After reading
address 1FFFh the device goes into an idle mode, so
additional reads return all “1s”.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW. SDA changes during SCL HIGH are
reserved for indicating start and stop conditions. Refer
to Figure 8 and Figure 9.
Start Condition
All commands are preceeded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X46402 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition is met.
A start may be issued to terminate the input of a con-
trol byte or the input data to be written. This will reset
the device and leave it ready to begin a new read or
write command. A start bit generated while the part is
outputting data is accepted as a start as long as the
device is not outputting a ’zero’.
Stop Condition
All communications are be terminated by a stop condi-
tion. The stop condition is a LOW to HIGH transition of
SDA when SCL is HIGH. The stop condition is also
used to reset the device during a command or data
input sequence and will leave the device in the standby
power mode. As with starts, stops are recognized while
the device outputs data, as long as the data output is
not a ‘zero’.
Figure 8. Data Validity
Load Command Byte
Load 2 Byte Address
Read/Write
Data Bytes
TWC or Data ACK Polling
SCL
SDA
Data
Stable
Data
Change
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X4165S8I 功能描述:IC CPU SUPRV 16K EE RST HI 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:1 系列:- 類型:簡單復位/加電復位 監(jiān)視電壓數(shù)目:1 輸出:開路漏極或開路集電極 復位:低有效 復位超時:標準傳輸延遲為 60 µs 電壓 - 閥值:3V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A,SOT-753 供應商設備封裝:SOT-23-5 包裝:Digi-Reel® 其它名稱:LM8364BALMF30DKR
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