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| 型號： | X40620V8-2.9 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 6/22頁 |
| 文件大?。?/td> | 401K |
| 代理商： | X40620V8-2.9 |
X4163/5 – Preliminary Information
Characteristics subject to change without notice.
6 of 22
REV 1.24 11/27/00
www.xicor.com
The X4163/5 resets itself after the first byte is read.
The master should supply a stop condition to be con-
sistent with the bus protocol, but a stop is not required
to end this operation.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
WEL: Write Enable Latch (Volatile)
The WEL bit controls the access to the memory and to
the Register during a write operation. This bit is a vola-
tile latch that powers up in the LOW (disabled) state.
While the WEL bit is LOW, writes to any address,
including any control registers will be ignored (no
acknowledge will be issued after the Data Byte). The
WEL bit is set by writing a “1” to the WEL bit and
zeroes to the other bits of the control register. Once
set, WEL remains set until either it is reset to 0 (by writ-
ing a “0” to the WEL bit and zeroes to the other bits of
the control register) or until the part powers up again.
Writes to the WEL bit do not cause a nonvolatile write
cycle, so the device is ready for the next operation
immediately after the stop condition.
WD1, WD0: Watchdog Timer Bits
The bits WD1 and WD0 control the period of the
Watchdog Timer. The options are shown below.
Write Protect Enable
These devices have an advanced Block Lock scheme
that protects one of eight blocks of the array when
enabled. It provides hardware write protection through
the use of a WP pin and a nonvolatile Write Protect
Enable (WPEN) bit. Four of the 8 protected blocks
match the original Block Lock segments and this pro-
tection scheme is fully compatible with the current
devices using 2 bits of block lock control (assuming the
BP2 bit is set to 0).
The Write Protect (WP) pin and the Write Protect
Enable (WPEN) bit in the Control Register control the
programmable Hardware Write Protect feature. Hard-
ware Write Protection is enabled when the WP pin and
the WPEN bit are HIGH and disabled when either the
WP pin or the WPEN bit is LOW. When the chip is Hard-
ware Write Protected, nonvolatile writes as well as to the
block protected sections in the memory array cannot be
written. Only the sections of the memory array that are
not block protected can be written. Note that since the
WPEN bit is write protected, it cannot be changed back
to a LOW state; so write protection is enabled as long
as the WP pin is held HIGH.
7
6
5
4
0
3
0
2
1
0
WPEN
WD1 WD0
RWEL
WEL BP2
WD1
0
0
1
1
WD0
0
1
0
1
Watchdog Time Out Period
1.4 seconds (factory setting)
600 milliseconds
200 milliseconds
disabled
Table 1. Write Protect Enable Bit and WP Pin Function
WP
LOW
HIGH
HIGH
WPEN
X
0
1
Memory Array not
Block Protected
Writes OK
Writes OK
Writes OK
Memory Array
Block Protected
Writes Blocked
Writes Blocked
Writes Blocked
Block Protect
Bits
Writes OK
Writes OK
Writes Blocked
WPEN Bit
Writes OK
Writes OK
Writes Blocked
Protection
Software
Software
Hardware
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X40620V8-3.1 | 8MHZ, TQFP, IND TEMP(MCU AVR) |
| X40620V8-3.1A | 8MHZ, MLF, IND TEMP, GREEN(MCU AVR) |
| X40620V8E-2.9 | Analog IC |
| X40620V8E-3.1 | Analog IC |
| X40620V8E-3.1A | Analog IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40620V8-3.1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| X40620V8-3.1A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| X40620V8E-2.9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| X40620V8E-3.1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| X40620V8E-3.1A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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