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參數(shù)資料
| 型號： | X40233 |
| 英文描述： | Integrated System Management IC Triple Voltage Monitors, POR, 2 kbit EEPROM Memory, and Single/Dual DCP(帶2K EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器) |
| 中文描述： | 綜合系統(tǒng)管理IC三電壓監(jiān)測器，葡萄牙，2千比特的EEPROM內(nèi)存，單/雙副處長（帶2K的EEPROM和單/雙數(shù)字電位器的三路電壓監(jiān)控器） |
| 文件頁數(shù)： | 16/39頁 |
| 文件大?。?/td> | 215K |
| 代理商： | X40233 |
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X4023x
– Preliminary Information
Characteristics subject to change without notice.
16 of 39
REV 1.0.4 7/12/01
www.xicor.com
Stops and EEPROM Write Modes
Stop conditions that terminate write operations must be
sent by the master after sending at least 1 full data byte
and receiving the subsequent ACKNOWLEDGE signal.
If the master issues a STOP within a Data Byte, or
before the X4023x issues a corresponding ACKNOWL-
EDGE, the X4023x cancels the write operation. There-
fore, the contents of the EEPROM array does not
change.
EEPROM Array Read Operations
Read operations are initiated in the same manner as
write operations with the exception that the R/W bit of
the Slave Address Byte is set to one. There are three
basic read operations: Current EEPROM Address
Read, Random EEPROM Read, and Sequential
EEPROM Read.
Current EEPROM Address Read
Internally the device contains an address counter that
maintains the address of the last word read incre-
mented by one. Therefore, if the last read was to
address n, the next read operation would access data
from address n+1. On power up, the address of the
address counter is undefined, requiring a read or write
operation for initialization.
Upon receipt of the Slave Address Byte with the R/W
bit set to one, the device issues an ACKNOWLEDGE
and then transmits the eight bits of the Data Byte. The
master terminates the read operation when it does not
respond with an ACKNOWLEDGE during the ninth
clock and then issues a STOP condition (See Figure 14
for the address, ACKNOWLEDGE, and data transfer
sequence).
It should be noted that the ninth clock cycle of the read
operation is not a “don’t care.” To terminate a read
operation, the master must either issue a STOP condi-
tion during the ninth cycle or hold SDA HIGH during the
ninth clock cycle and then issue a STOP condition.
Another important point to note regarding the “Current
EEPROM Address Read” , is that this operation is not
available if the last executed operation was an access
to a DCP or the CR Register (i.e.: an operation using
address
15
address
11
5 bytes
7 bytes
address
= 6
address pointer
ends here
Addr = 7
Figure 13. Example: Writing 12 bytes to a 16-byte page starting at location 11.
10
10
10
10
S
t
a
r
t
S
t
o
p
Slave
Address
Data
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
Figure 14. Current EEPROM Address Read Sequence
1 0 1 0 0 0 0 1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X40233S16I-A | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40233S16I-AT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40233S16I-B | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40233S16I-BT1 | 功能描述:IC VOLTAGE MON TRPL EE 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 標準包裝:100 系列:- 類型:簡單復(fù)位/加電復(fù)位 監(jiān)視電壓數(shù)目:1 輸出:- 復(fù)位:低有效 復(fù)位超時:最小為 100 ms 電壓 - 閥值:4.38V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-TSSOP 包裝:管件 |
| X40235 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple Voltage Monitors, POR, 2 kbit EEPROM MEMORY, and Single/Dual DCP |
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