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參數資料
| 型號： | X4003S8I-4.5A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 電源管理 |
| 英文描述： | SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:1600V; On-State RMS Current, IT(rms):38A; Peak Non Repetitive Surge Current, Itsm:700A; Gate Trigger Current Max, Igt:150mA |
| 中文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數： | 7/18頁 |
| 文件大?。?/td> | 378K |
| 代理商： | X4003S8I-4.5A |
X4003/X4005
Characteristics subject to change without notice.
7 of 18
REV 1.1.3 4/30/02
www.xicor.com
Figure 5. Valid Data Changes on the SDA Bus
SCL
Data Stable
Data Change
Data Stable
SDA
Serial Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The device continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met. See
Figure 6.
Serial Stop Condition
All communications must be terminated by a stop condi-
tion, which is a LOW to HIGH transition of SDA when
SCL is HIGH. The stop condition is also used to place
the device into the Standby power mode after a read
sequence. A stop condition can only be issued after the
transmitting device has released the bus. See Figure 6.
Figure 6. Valid Start and Stop Conditions
SCL
SDA
Start
Stop
Serial Acknowledge
Acknowledge is a software convention used to indicate
successful data transfer. The transmitting device, either
master or slave, will release the bus after transmitting
eight bits. During the ninth clock cycle, the receiver will
pull the SDA line LOW to acknowledge that it received
the eight bits of data. Refer to Figure 7.
The device will respond with an acknowledge after rec-
ognition of a start condition and the correct contents of
the slave address byte. Acknowledge bits are also pro-
vided by the X4003/4005 after correct reception of the
control register address byte, after receiving the byte
written to the control register and after the second
slave address in a read question (See Figure 8 and
See Figure 9.)
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| X4005M8I | RTC Module With CPU Supervisor |
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