參數(shù)資料
型號(hào)： X4003M8IZ
廠商： INTERSIL CORP
元件分類(lèi)： 電源管理
英文描述： RTC Module With CPU Supervisor
中文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8
封裝： 3 MM, ROHS COMPLIANT, PLASTIC, MO-187AA, MSOP-8
文件頁(yè)數(shù)： 7/18頁(yè)
文件大?。?/td> 279K
代理商： X4003M8IZ
7
FN8113.1
May 11, 2006
Figure 4. V
TRIP
Programming Sequence
Control Register
The control register provides the user a mechanism
for changing the watchdog timer settings. watchdog
timer bits are nonvolatile and do not change when
power is removed.
The control register is accessed with a special preamble
in the slave byte (1011) and is located at address 1FFh.
It can only be modified by performing a control register
write operation. Only one data byte is allowed for each
register write operation. Prior to writing to the control reg-
ister, the WEL and RWEL bits must be set using a two
step process, with the whole sequence requiring 3 steps.
See "Writing to the Control Register" below.
The user must issue a stop after sending the control
byte to the register to initiate the nonvolatile cycle that
stores WD1 and WD0. The X4003/X4005 will not
acknowledge any data bytes written after the first byte
is entered.
The state of the control register can be read at any
time by performing a serial read operation. Only one
byte is read by each register read operation. The
X4003/X4005 resets itself after the first byte is read.
The master should supply a stop condition to be con-
sistent with the bus protocol, but a stop is not required
to end this operation.
V
TRIP
Programming
Apply 5V to V
CC
Decrement V
CC
(V
CC
= V
CC
- 50mV)
RESET pin
goes active
Measured V
TRIP
-
Desired V
TRIP
DONE
Execute
Reset V
Sequence
Set V
CC
= V
CC
Applied =
Desired V
TRIP
Execute
Set V
TRIP
Sequence
New V
Applied =
Old V
CC
applied + Error
Execute
Reset V
Sequence
New V
CC
Applied =
Old V
CC
Applied - Error
Error
≤
–Emax
-Emax < Error < Emax
YES
NO
Error
≥
Emax
Emax = Maximum Allowable V
TRIP
Error
7
0
6
5
4
0
3
0
2
1
0
0
WD1
WD0
RWEL
WEL
X4003, X4005
相關(guān)PDF資料
PDF描述
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