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參數(shù)資料
| 型號(hào)： | X28HC64SZ-70 |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | 5 Volt, Byte Alterable EEPROM |
| 中文描述： | 8K X 8 EEPROM 5V, 70 ns, PDSO28 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, MS-013AE, SOIC-28 |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 265K |
| 代理商： | X28HC64SZ-70 |
7
FN8109.1
June 7, 2006
THE TOGGLE BIT I/O
6
Figure 4. Toggle Bit Bus Sequence
Figure 5. Toggle Bit Software Flow
The Toggle Bit can eliminate the chore of saving and
fetching the last address and data in order to implement
DATA Polling. This can be especially helpful in an array
comprised of multiple X28HC64 memories that is fre-
quently updated. Toggle Bit Polling can also provide a
method for status checking in multiprocessor applica-
tions. The timing diagram in Figure 4 illustrates the
sequence of events on the bus. The software flow dia-
gram in Figure 5 illustrates a method for polling the
Toggle Bit.
CE
OE
WE
X28HC64
Ready
Last
Write
I/O
6
HIGH Z
*
*
V
OH
V
OL
* Beginning and ending state of I/O
6
will vary.
Compare
Ok
No
Yes
Compare
Accum with
Addr N
Load Accum
From Addr N
Last Write
Ready
Yes
X28HC64
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| X28HC64T-12 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5 Volt, Byte Alterable E2PROM |
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| X28HC64T-90 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:5 Volt, Byte Alterable E2PROM |
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